What’s new in HyperLynx 2409
Siemens Electronic Systems Design & Manufacturing
A segment of Siemens EDA. We enable companies to develop better electronic products faster and more cost-effectively.
HyperLynx is expanding beyond high-speed design to provide simulation and analysis for all stages of PCB design and verification. HyperLynx now includes schematic verification and general-purpose circuit simulation. Xpedition Valydate is joining the HyperLynx family as HyperLynx Schematic Analysis, and Xpedition AMS is joining the HyperLynx family as HyperLynx AMS. There are the same great products as before, with new and improved capabilities as noted below.
The HyperLynx family has three main goals:
Next generation electronics system design
One of the standout features of HyperLynx 2409 is its new, modern user experience. HyperLynx 2409 is the first generation of HyperLynx built on this next generation electronic system design platform. Shared by all Xpedition and HyperLynx products, the next generation of electronic systems design dramatically increases productivity and makes HyperLynx analysis available to a wider group of designers. The engineering workforce is changing, with new designers entering the workplace looking to become productive immediately, instead of spending years coming “up to speed”. This new platform combines a state-of-the-art user experience with machine learning-based command prediction and extensive customization capabilities to support both occasional users and dedicated analysis experts without compromise. Words alone can’t convey the impact our next generation electronic systems design solutions will have on HyperLynx usability – download HyperLynx 2409 today and see how easy advanced analysis can be!
Rules-based schematic verification
HyperLynx Schematic Analysis 2409 has an updated project navigator that makes it easier to track relationships within your design. Error reporting has been refined to report three categories—critical, defect, and warning—and summarized results are presented as a pie chart, making it easier to see design status. Additionally, the command line interface has been enhanced for clarity, and the extended net viewer now allows multiple views to be opened simultaneously, improving visibility and navigation.
Analog/mixed-signal simulation
HyperLynx AMS 2409 comes with several enhancements that improve user experience and workflow efficiency. Swept-parameter analysis includes an improved parameter dialog where parameters are now arranged in a hierarchical list that is easier to navigate. The process of mapping symbol pins to model ports in the model and symbol wizard has been streamlined to reduce the chance of making duplicate assignments and simplify the process.
Rules-based PCB verification
HyperLynx DRC 2409 now allows designers to increase checking performance by constraining analysis to a section of the design. An improved area crop function can be used to isolate areas of the design and export them as .cce files for independent analysis. The area to be exported can be created either from a list of design objects or user-supplied coordinates. HyperLynx DRC 2409 also supports enhanced geometry resolution, reducing the minimum feature size from 10 nanometers to 1 nanometer. This increases the analysis accuracy and aligns HyperLynx DRC with Xpedition and other HyperLynx signal integrity products.
HyperLynx Signal and Power Integrity
General
The BoardSIM 3D board viewer has been substantially improved and is now accessible for all tiers of HyperLynx SI and PI, without requiring additional license features. 3D views appear in a new tab that can be displayed side-by-side next to the board layout using a tiled view.
Via handling has been substantially enhanced to allow HyperLynx to interpret the via diameter specified in the PCB database as either the drill width or finished hole size, depending on how the user sets up analysis. Getting the outer diameter of a high-speed via correct is critically important to ensuring accurate simulation results, and PCB design practices are inconsistent. HyperLynx supports both design styles, with the ability to override geometries on individual vias and padstacks.
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DDR5 interface analysis
DDR5 and LPDDR5 simulation flows are improved through an DDRX Batch Wizard with easier configuration of AMI parameters. This release streamlines simulation setup by automatically inserting IBIS-AMI models where needed. Generic IBIS-AMI models for registered DDR5 memories are included for use when device-specific models are unavailable. DR5 simulation accuracy is enhanced with an improved de-skewing algorithm and a more realistic crosstalk algorithm. HTML reports now use JEDEC standard names to make comparison with datasheet results easier.
Serial link compliance
3D area detection features improved speed, more robust return path detection and improved area reuse to reduce the number of areas that are solved. Protocol updates for automotive high-speed Ethernet include both 100 Megabit and 1000 Megabit speeds. New protocols include extensions for 800 Gigabit Ethernet and refinements to 100 Gigabit and OIF COM algorithms, along with support for OIF 224 Gigabit Medium Reach PAM4.
EDM integration improvements
Integration with Siemens Enterprise Data Management (EDM) tools has been expanded to improve support for pre-layout simulations. These features make managing HyperLynx data within EDM more efficient and collaborative.
HyperLynx Advanced Solvers
Full-Wave Solver and job distribution
Enhancements to the Full-Wave Solver result in solve times that are 2-3 time faster than the previous release, reducing the time needed for workflows like verifying high-speed serial channels for standards compliance.
Job distribution allows users to further reduce solve times by distributing solver jobs across multiple cores or machines. This release brings advanced diagnostics for job distribution, which provide detailed insight into the status of individual solver projects—whether pending, solving, or solved—and the health of all distributed machines. Users can also drill down to see the results for a specific project. Expanded VPN support adds flexibility for various network configurations.
HyperLynx 3D Explorer and Design Space Exploration
3D Explorer includes several new templates for simulating High-Density Interconnect (HDI) vias, which are commonly used to improve signal integrity on high-speed serial links and increase routing density. The built-in HDI via templates support both staggered and stacked microvias, essential for modern HDI PCB designs. HyperLynx Design Space Exploration (DSE) now includes a general portal that can be configured to connect with other software tools, expanding optimization capabilities beyond the native HyperLynx environment. This allows users to drive processes through stored files or APIs, thereby streamlining design and optimization workflows.
Hybrid Solver
Performance improvements to the Hybrid Solver enable users to conduct faster and more memory-efficient PDN and signal power-aware simulations. In one reference case, an AC decoupling power integrity simulation of a Power Distribution Network (PDN) solved 40% faster, dropping from 48.5 minutes to just 28.7 minutes. Additionally, peak memory usage was reduced from 28 GB to 16 GB, enhancing efficiency without compromising accuracy.
Download HyperLynx 2409 today!
This release introduces a modern user experience with a more adaptive and intuitive interface, significantly lowering the user learning curve. Key updates include enhancements to schematic verification, analog/mixed-signal simulations, DDR and serial channel signal integrity, full-wave and hybrid electromagnetic solving. These improvements collectively offer a more efficient, accurate, and user-friendly experience for engineers working in PCB and system design. Watch videos and learn more here.
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