What is the difference between a "Design Engineer" & a "Design and Verification Engineer" in VLSI?

Both the fields of ASIC Design and ASIC verification are equally good and have a good number of opportunities.

Let's discuss them one by one and then we can arrive at the conclusion.

ASIC Design: -

The role and responsibilities in this domain majorly consist of the following: -

• You will get the scope to learn about the?microarchitecture?specification of a given block or IP in detail and will be given the work to write?RTL?codes in?VHDL/Verilog/SV?of a corresponding module.
• The?functionality?understanding will be in very deep as you will be able to know each and every minute detail of the design.
• You can get the scope to work on?Timing Analysis, Synthesis, and Gate level Simulation?as well depending on the requirement of the project.
• You can also get the scope to?Integrate?various IP blocks at a SOC level and in that process, you will get a complete overview of the system.

But to enter to this field following skill sets are required: -

1. Good understanding of?Digital?Design.
2. Good coding knowledge of?VHDL, Verilog,?and?SystemVerilog.
3. Timing Analysis?concept.
4. Scripting?knowledge.

ASIC Verification: -

• Here you will get the scope to verify various designs of IP or SOC by building self-checking Testbenches using?SV/OVM/UVM.
• As a Verification Engineer, the primary role of yours is?Debugging?so that the bugs can be caught and fixed within the Design. Waveform?debugging is also a major skill.
• Like Design Engineer, you also need to have a complete understanding of the?specification.
• You can also get the work to build a class-based?Testbench?from the scratch or if it is existed then write?Testcases?to check whether all the desired functionality of the Design is correct or not.
• You can also receive the work on?Functional/Code Coverage?and?Assertion-based verification.

So here also to enter into this domain you need the following skills: -

1. Good knowledge of?Digital Design.
2. Good coding knowledge of?SystemVerilog?and methodologies like?UVM/OVM.
3. Scripting?knowledge.

So, as you can see both fields are equally good in terms of learning and career-wise.

But, almost 70% of the Design Cycle in ASIC flow is consumed in Verification, so opportunities in terms of vacancies are a bit more in ASIC verification than compared to ASIC Design.