Use PLC to Implement Land Based Railway Track Fixed Block Signaling OT System
Project Design Purpose: This project aims to use Programmable Logic Controllers (PLC) with train detection sensors and train control signals to develop an automated OT system for railway track fixed block signaling control. The system will include a digital equivalent simulation to explain the logic of the track fixed block Automatic Train Control (ATC) mechanism for demonstration and training purposes. In this article, we will introduce the design of the block controller's electrical circuit, then demonstrate how to implement this circuit using PLC ladder logic diagrams and structured text. Finally, we will show how to integrate multiple controllers to build an railway Automatic Train Protection (ATP) system capable of handling complex situations, such as controlling multi-track junctions and block override.
Important: Real-world railway Automatic Train Control mechanisms, including Automatic Train Protection (ATP) and Automatic Train Operation (ATO), are much more complex than what we introduced in the article. This project simplifies the general operation logic for training purposes only.
# Version: v0.1.3
# Created: 2024/07/18
# Copyright: Copyright (c) 2024 LiuYuancheng
# License: MIT License
Introduction
Fixed block signaling and moving block signaling are the two main railway signaling systems used in modern Automatic Train Control (ATC). Fixed block signaling is a traditional method that manages train movements by dividing the railway track into discrete segments or blocks. Moving block signaling is a modern, dynamic system that allows for real-time management of train movements, offering increased efficiency and flexibility. This document demonstrates how to implement a fixed block Automatic Train Protection (ATP) and Operation mechanism in a railway track digital simulation OT (Operational Technology) system.
The implementation comprises three sub-projects, covering three basic levels of an OT system.
The system OT structure and workflow is illustrated below:
The physical world simulation will generate the simulated electrical signal and fill to the PLCs, then the PLC will execute the ladder logic and generate the simulated electrical signal to control the components' state in the physical world simulation program. At the same time, we will also provide two types of Control Center (HQ) human machine interface HQ Junction and Station ATC Monitor HMI and HQ Track ATC Monitor and Control HMI for railway operator to monitor and control the system.
In this article, we will introduce some basic background knowledge about railway Fixed/Moving block systems, Automatic Train Control (ATC), Automatic Train Protection (ATP), and Automatic Train Operation (ATO). We will then present the system design, including the physical world digital equivalent program, the fixed block controller, the multi-track block control system, and the ATP override function design.
Background knowledge
This section provides a brief overview and comparison of fixed and moving block signaling systems, PLC ladder logic diagrams, and PLC structured text programming. If you are already familiar with these concepts, you may skip this section. For those seeking more detailed information, we have included reference documents for further reading.
Introduction of Fixed Blocking System
The track fixed blocking system is a fundamental method used in railway signaling to ensure safe and efficient train operations. This system divides the railway track into sections known as "blocks." Only one train is allowed in each block at any given time, preventing collisions and ensuring a safe distance between trains.
Key Features of Track Fixed Blocking System:
The track fixed blocking system is a reliable and straightforward method for managing train traffic, providing the foundational safety mechanism for railways around the world.
Compare Between Fixed Blocking and Moving Blocking
PLC Ladder Diagram Programming
PLC ladder diagram programming is a graphical programming language used to develop software for programmable logic controllers (PLCs). It is widely used in industrial automation and control systems due to its intuitive, visual nature, which resembles electrical relay logic schematics.
PLC Structure Text Programming
The Structured Text (ST) language is one of the programming languages defined in the IEC 61131-3 standard for programmable logic controllers (PLCs). ST is a high-level programming language that resembles traditional programming languages like Pascal or C, making it a powerful and flexible tool for developing complex control algorithms in industrial automation.
System Design
This section introduces the design of the system's functions, which are divided into four main parts:
Physical World Simulation Design
To implement fixed block signaling, we need both trackside ATC and trainborne ATC systems. There are various levels of ATC, as illustrated by the European Rail Traffic Management System (ERTMS):
In our simulation program, we will simplify the design by implementing two key elements of railway signaling:
As shown below, we match the fixed block signaling system to the 2D simulation program:
Train Detection Sensor: In the 2D simulator, there will be train detection sensors (small grey boxes) placed at intervals along the tracks. When a train (green rectangles) moves over a sensor, the sensor will change color to blue and generate a simulated voltage change message.
The sensor color codes are:
Block Control Signal: In the 2D simulator, signals (big red/green boxes) controlled by the fixed block controller will be placed next to the track near each sensor. The train will continuously detect the area 50 pixels ahead. If it detects a red signal, the train will brake to reduce speed and stop before the signal. If the signal is green, the train will proceed through the signal area to enter the block.
The signal color codes are :
Track Block Controller Design
After completing the simulation of physical world components, we need to develop the track fixed block ATC control circuit. We use PLC to implement the block control circuit so that OT engineers can easily monitor the block state and override it in case of emergencies.
First, let's analyze the state changes of the sensors and signals. A signal will switch to the "on" (red) state when the block sensor(n) is triggered and remain "on" until the next block sensor(n+1) is triggered, after which it switches to the "off" state, as shown in the table below:
These changes can be mapped to the basic JK flip-flop circuit, as shown below:
To generate the trigger clock cycle, we can add another sensor behind sensor(n) and sensor(n+1) to create the clock. We can also use the sensor voltage change to build the clock cycle, but we cannot connect both sensor(n) to J and CLK directly, as when the clock is generated the state change and clock up pulse happen at the same time, sensor(n)'s state will be "unknown", the clock pulse need to be "later" than the J input changed (as shown below):
To shift the clock pulse correctly, we need to add a delay timer. The train takes about 15 seconds to pass the sensor, so we delay the sensor by 0.5 ~ 1 second. Then, we use an OR gate to combine the inputs from the two sensors. The final circuit design is shown below:
We will show how to use PLC to implement this circuit via Ladder Logic Diagram and Structured Text Language.
Implementing the Circuit via PLC Ladder Diagram
After designing the electrical circuit logic, we will implement it with a PLC ladder logic diagram. We need two PLC input contacts to read the voltage from the two sensors and one coil to change the signal state. Most PLC ladder editors provide built-in JK/T/SR-flip-flop modules for using, but you can also use NAND gates to build one if needed.(As shown below)
Reference: If you want to build your own JK flip flop ladder diagram in PLC, you can follow this document: https://instrumentationtools.com/topic/j-k-flip-flop/
The PLC ladder logic diagram is shown below:
Wire connection of the PLC input contact and output coils:
Implement the Circuit via PLC ST(Structure Text) Language
We can also use the PLC ST program language to implement the circuit.
We create a JK flip flop function block fist :
FUNCTION_BLOCK JK_FlipFlop
VAR_INPUT
J : BOOL; // J input
K : BOOL; // K input
CLK : BOOL; // Clock input
RESET : BOOL; // Reset input
END_VAR
VAR_OUTPUT
Q : BOOL; // Q output
Q_NOT : BOOL; // Q' output (inverse of Q)
END_VAR
VAR
last_CLK : BOOL := FALSE; // Previous state of the clock
END_VAR
// Function block implementation
IF RESET THEN
// Asynchronous reset
Q := FALSE;
Q_NOT := TRUE;
ELSE
// Detect rising edge of the clock
IF (CLK = TRUE) AND (last_CLK = FALSE) THEN
// Rising edge detected
IF (J = TRUE) AND (K = FALSE) THEN
// Set
Q := TRUE;
Q_NOT := FALSE;
ELSIF (J = FALSE) AND (K = TRUE) THEN
// Reset
Q := FALSE;
Q_NOT := TRUE;
ELSIF (J = TRUE) AND (K = TRUE) THEN
// Toggle
Q := NOT Q;
Q_NOT := NOT Q_NOT;
END_IF;
END_IF;
END_IF;
// Update last clock state
last_CLK := CLK;
END_FUNCTION_BLOCK
Now we make a 1 sec timer module via ST language :
FUNCTION_BLOCK TON
VAR_INPUT
IN : BOOL; // Timer input
PT : TIME; // Preset time
END_VAR
VAR_OUTPUT
Q : BOOL; // Timer output
ET : TIME; // Elapsed time
END_VAR
VAR
start_time : TIME; // Start time
running : BOOL; // Timer running flag
END_VAR
// Function block implementation
IF IN THEN
IF NOT running THEN
// Start the timer
start_time := TIME();
running := TRUE;
END_IF;
// Calculate elapsed time
ET := TIME() - start_time;
IF ET >= PT THEN
Q := TRUE;
ELSE
Q := FALSE;
END_IF;
ELSE
// Reset the timer
Q := FALSE;
ET := T#0s;
running := FALSE;
END_IF;
END_FUNCTION_BLOCK
After build the 2 components module we can make our Main PLC ST program:
PROGRAM Main
VAR
timer : TON; // Instance of the TON function block
jkflipflop : JK_FlipFlop // Instance of the JK FLIP FLOP function block
or_gate : OR_Gate; // Instance of the OR_Gate function block
input1 : BOOL := FALSE; // Input 1 for OR gate
input2 : BOOL := FALSE; // Input 2 for OR gate
CLK_input: BOOL := FALSE;
timer_input: BOOL := FALSE; // Input for the timer
preset_time: TIME := T#1s; // Preset time for the timer (1 seconds)
or_output : BOOL; // Output of the OR gate
timer_output : BOOL; // Output of the timer
END_VAR
// Assign inputs to the timer
timer.IN := timer_input;
timer.PT := preset_time;
// Set flip flopp in
flipflop.J := input1;
flipflop.K := input2;
// run timer
timer_input:= input1 OR input2
timer();
timer_output := timer.Q;
// Create the clock pulse
CLK_input := timer_input
flipflop.CLK := CLK_input;
// Run flipflop
flipflop();
// Get the outputs from the flip-flop
Q_output := flipflop.Q;
Now after use the PLC built the block controller, we can link multiple tack block controllers together to build a single track's fixed block ATC system as shown below:
Remark: we can use one PLC to control multiple blocks, in the picture, we want to make the connection clear so each PLC control one Fixed block.
Multi-Tracks Fixed Blocks Design
Building on the previous section where we implemented a single track with multiple fixed blocks, we can now handle a more complex scenario: track junctions. As illustrated below:
When a train on the orange line passes through the two junctions, we need to not only lock the fix blocks on the orange line but also the two green line blocks at the junction cross area. This ensures that only one train can occupy the junction area at any time, preventing other trains from entering. The junction block control is illustrated below:
When a train on the green track enters a 'not lock' or 'free' junction, it triggers the junction entrance sensor. The PLC then activates the signal to block trains on the orange line from entering the junction, changing the junction state to 'locked'.
Once the train has left the junction, it triggers the junction exit sensor. The PLC then deactivates the signal, allowing trains on the yellow line to enter the junction, and changes the junction state to 'not hold.'
By combining track block control and junction block control, we achieve the following circuit setup:
Given the complexity of the junction, each junction typically requires 3 to 6 block controllers to implement ATC effectively.
Controller ATC Override Design
In emergency situations, the HQ operator may need to temporarily disable the ATC system. By using a PLC, the operator can use the track block HMI to change the state of the PLC coils, thus altering the signal. However, this might only work once, as any subsequent triggering of the JK flip-flop input sensor will change the signal again. To make the override controllable, we need to add an additional AND gate to enable or disable the clock. The circuit design is shown below:
In the ladder logic, we connect the AND gate to a holding register, HR3. In the HMI, when the operator activates the block override function, HR3 is set to 0. This prevents the sensors from generating a clock signal to the control circuit. As a result, after the operator changes the signal state, the signal will remain unchanged even if the sensors are triggered.
Now we have build a fully automated tracks fixed block control system.
Thanks for spending time to check the article detail, if you have any question and suggestion or find any program bug, please feel free to message me. Many thanks if you can give some comments and share any of the improvement advice so we can make our work better ~
IEC62443 | NSE7 | Regional Solution Architect at Fortinet
7 个月Very interesting implementation. Do you know what are some of the emergency situations, that the HQ operator may need to temporarily disable the ATC system?
SDN/IP/MPLS/Cloud-Native/Solution-Architect/Automation/Linux/DB (CCIE Enterprise # 60345)
7 个月Insightful!
Cyber Security Leader, GICSP, ISA62443 Cyber Security Expert, NSE7-OT, CCIE# 51504, PMP#1294234,
8 个月Mohamed Omran