Unpacking "shift left" in IC design – why early verification matters

Unpacking "shift left" in IC design – why early verification matters

Welcome back to Design with Calibre’s LinkedIn Newsletter! In this month's issue, we’ve asked our very own Michael White , Senior Director, Physical Verification Product Management, and David Abercrombie , Product Management Director, to take a deep dive into how shift left - a proactive strategy that brings verification earlier into the design process- is transforming IC design and how you can leverage this approach for faster, smarter results!

Hello IC design enthusiasts!

With the growing complexity of integrated circuit (IC) designs, it's crucial to keep our verification processes up to speed. That’s where the shift left approach steps in. Originally a software term, it’s now reshaping how we tackle IC design by catching potential issues before they turn into costly late-stage problems.

What exactly is “shift left”?

Imagine this: instead of saving crucial verification checks for the end, where any mistake can cause a major setback, we perform those checks earlier. This change—moving verification at the finish line up to verification from the starting blocks—means that errors are identified and resolved upfront, sparing us from costly and time-consuming reworks.

This term shift left isn’t just a buzzword; it’s a strategic approach to meeting the demands of today’s increasingly complex ICs, like system-on-chips (SoCs) and 3D IC assemblies. Leaders like Siemens have adopted this strategy with tools like the Calibre? nmPlatform. These tools bring verification into early design stages, allowing us to ensure designs align with stringent foundry standards, saving us time and money down the line.

Why early verification matters: Unlocking the power of shift left

The complexity of IC designs today makes traditional verification inefficient. Finding issues at signoff often means substantial reworking—sometimes requiring entire layouts to be rethought. Shift left aims to eliminate this scramble by:

  • Early error detection: Identifying and addressing issues early, before they cascade into bigger problems.
  • Improved productivity: Using Calibre’s signoff-quality verification throughout the design flow reduces the need for iterative rework.
  • Cost efficiency: With fewer late-stage fixes, shift left keeps costs down.

For an in-depth exploration, check out our technical paper: A game changer for IP designers: design stage verification.

Four key pillars for seamless IC design

To overcome these challenges in IC design, our Calibre shift left technologies include tools and functionalities that are intentionally designed for design-stage design verification and optimization through four foundational pillars: Verification, Execution, Debug, and Correction. We’ve given you the link to a technical paper taking a thorough look at this, but for now, here’s a quick look at each of them:

  1. Verification: Early checks ensure reliability and performance. With targeted tools like Calibre’s equation-based DRC we can catch potential issues before they multiply.
  2. Execution: Efficient execution is key. Tools like Calibre nmDRC? Recon streamline early-stage DRC by ignoring non-critical errors in incomplete designs, allowing designers to focus on real issues first.
  3. Debug: Troubleshooting takes time, but shift left tools quickly classify and visualize errors, making debugging a breeze. Real-time feedback within the design environment means fewer back-and-forth checks and quicker issue resolution.
  4. Correction: Automated tools back-annotate layout changes, ensuring that corrections improve design quality and manufacturability without manual intervention.


From faster time-to-market to higher quality: The business impact of shift left

The benefits of shift left extend beyond engineering efficiency to bottom-line impact:

  • Reduced time-to-market: Faster error detection means faster design cycles.
  • Enhanced design quality: Early error fixing contributes to better overall design.
  • Higher productivity: Automation frees up engineers to focus on innovation, not just troubleshooting.

Enhancing productivity and reducing costs

To maximize the shift left advantage, consider these tips:

  • Use Calibre tools early: Start with signoff-quality tools to avoid discrepancies between early and late-stage results.
  • Automate whenever possible: Automation reduces errors and speeds up the workflow.
  • Keep teams trained: Familiarity with these tools enhances productivity and accuracy.
  • Adopt AI and ML: Lean into machine learning for smarter resource planning and quicker setups. Learn more about Calibre AI here

How AI and automation drive efficiency in shift left design verification

As IC designs grow more intricate, artificial intelligence (AI) helps smooth the shift left process. By analyzing data patterns, AI assists with verification and debugging, saving valuable time. With AI-driven tools, resource requirements become easier to manage, and setups run faster, making the entire process more efficient.

Wrapping up: The future of IC design

Shift left isn’t a passing trend—it’s a key to delivering higher-quality IC designs faster. By addressing potential issues early and adopting advanced technology like Calibre nmPlatform, shift left allows design teams to stay competitive in an ever-evolving industry. Ready to dive in? We’ve compiled a whole library of resources including videos, papers, blogs and more – you can find discover the full suite of Calibre shift left solutions here!

Shift left isn’t just a good idea; it’s becoming essential. Let’s tackle design complexity head-on with early verification and smarter tools.

Thanks for reading!

Michael White

Senior Director, Physical Verification Product Management

Calibre Design Solutions


David Abercrombie

Product Management Director

Artificial Intelligence, Multi-Patterning & Licensing Applications

Siemens Digital Industries Software

You can find a variety of more resources from us on Michael and David’s conversation about shift left here:

Blog: Using a shift left strategy to address block/chip design challenges during design-stage verification

Video: Shift left with Calibre

Technical Paper: Reduce 3DI C design complexity: early package assembly verification

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We hope you find this newsletter valuable and informative. If you have any feedback or suggestions for future topics, please feel free to reach out to us on LinkedIn.

Thank you for being a part of our EDA community!


E Santosh Kumar

QA Engineer at Siemens EDA || Siemens Calibre || VLSI || Physical Design and Verification || Cadence Design Systems Certified || ECE Undergrad '24 KLU || Specialization in VLSI

3 个月

Very well articulated the importance of early stage verification. Useful though!

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