Understanding PD Measurement Circuits and Calibration Procedures

1.INTRODUCTION                                       

1.1. OBJECTIVE

I am writing this article with the objective of detailing the assessment of the test circuits comprised at IEC 60270:2015, as well as to analyze the influence of different calibration procedures into the fidelity of test results. I hope to achieve the expectations of the reader with clarity and a balance of technical content and practical experience.

Each topic will be addressed by providing firstly a technical background of the topic, secondly each test circuit/calibration procedure will be individually assessed and lastly, comparisons between parts will be drawn.

1.2. REFERENCES

[1]  IEC 60270:2015 – High-voltage test techniques – Partial discharge measurements;

[2]  A. Gemant and W. Philippoff, “Die Funkenstrecke mit Vorkondensator,” Zeitschrift für Technische Physik vol. 13, no. 9, pp. 425–430, 1932;

[3]  CIGRé Brochure 676 – Partial Discharges in Transformers – WG D1.29, Feb. 2017;

2.TECHNICAL ANALYSIS

 2.1.TECHNICAL BACKGROUND

 Although it isn’t the objective of this document to detail in-depth the theoretical aspects regarding Partial Discharge, the topic under analysis does require some knowledge of PD and the quantities involving it.

The next item has the objective of providing the technical background required for a good understanding of the upcoming items.

2.2.PARTIAL DISCHARGE AND APPARENT CHARGE

IEC [1] defines Partial Discharge as “localized electrical discharge that only partially bridges the insulation between conductors…”. As a localized discharge, the actual PD current pulse and, ultimately, the PD charge value can’t be directly measured. Consequently, the approach utilized by Gemant and Philippoff [2] regards the calculation of the “Apparent Charge”. IEC utilizes the same methodology and defines apparent charge as the “charge which, if injected within a very short time between the terminals of the test object in a specified test circuit, would give the same reading on the measuring instrument as the PD current pulse itself”.

The latter definition states clearly the importance of the location in which the apparent charge shall be injected (or measured across) in such way the reading of the measuring instrument would be the same if the real PD charge were being directly measured. The impedance of the test object, mainly its capacitance, plays a major role in the determination of the apparent charge. It will be proved further into this article the importance of properly calibrate the test circuit in order to correctly establish the ratio between the injected charge (apparent charge) and the reading of the measuring instrument.

The a-b-c model, proposed by Gemant and Philippoff [2] in 1932, comprises basically of three capacitances as shown in the Figure 1, in which ???? represents the virtual capacitance of the test object, ???? represents the stray capacitance around the PD source and lastly, ???? represents the internal capacitance of the PD source. The spark gap, F, is such that it discharges every time the voltage across ???? reaches a certain value, temporally bridging ???? and partially bridging the test object.

Figure 1 – a-b-c model

The sparking of ?? and subsequently discharging of ???? through the spark gap changes the charge balance among all the capacitances leading to, temporarily, a redistribution of the remaining charges. As consequence of this redistribution, the voltage across the terminals of the test object transiently drops, promoting the generation of a current pulse through ????. The charge, ????, discharged at ?? can be calculated by the following equation:

Also,

By considering the condition ???? >> ???? , which is always satisfied, the previous equation can be rewritten as:

As ???? and ???? are in series when seen by the terminals of ????, the charge within each capacitor inherently is the same, so:

Although ???? is proportional to the charge at the PD source, ????, it cannot be determined by measuring the voltage drop across the terminals of the test object as both values of ???? and ???? are not known. Additionally, due to the complex RLC circuit that composes either the test object as the other parts of the test circuit, the voltage waveform is severely changed, and its amplitude altered, not resembling the original waveform of ???? at the PD site.  

Hence, another quantity shall be used to characterize this phenomenon. This quantity is the integral over time of the pulse current generated by the charge redistribution during the PD occurrence. If the test object is installed alongside a coupling capacitor, ????, as per Figure 2, the latter can externally provide the charge lost during the discharge of ????, balancing out the charges.

The charge transferring between ???? and the capacitance of the test object with ???? temporarily bridged, i.e. (???? + ????), generates the pulse current ??(??) and its integral over time is equal to the apparent charge. Consequently, it is not the real charge at the PD source, ????, that is being measured, but a charge that, when injected in the balanced system comprised by the test object, will promote the same voltage unbalancing between ???? and ???? as the real ???? would promote if the test object has a PD originating defect. 

Figure 2 – Coupling capacitor and test object 

Moreover, despite the apparent charge being a quantity not dependent of the test object, the response (reading in the measuring instrument) of the latter to the standardized injected charge is. Thus, it is imperative that the reading of the measuring instrument be properly scaled in order to linearly represents the injected charge and therefore enabling the comparison of measured charge values with standard’s criteria and/or another test performed accordingly. 

The pulse current propagating from the PD site to the terminals of the test object may also be subjected to distortion, i.e. the amplitude is often attenuated, the duration elongated, and harmonic oscillations imprinted into the waveform, however the current-time integral of such waveform remains the same. This fact corroborates the selection of the pulse charge, evaluated as apparent charge, for determining the PD performance of a given test object. The Figure 3 illustrates the aforementioned.  

Figure 3 – Signal distortion [3] 

2.3. TEST CIRCUITS 

The standard IEC [1] specifies three basic PD test circuits in order to ensure the reproducibility of test results. The circuits differ mainly by the position of the coupling device a.k.a. measuring impedance, ????, which is the device responsible for converting the PD pulse current into a voltage signal, also acting as bandpass filter and optionally protecting the input of the PD measuring instrument against over-voltages. 

The Figure 4 illustrates one of the specified test circuits. 

The coupling capacitor, ????, has the function of providing a low impedance path to the PD pulse current whilst separating the coupling device from the high-voltage side of the test circuit. ???? must free of PD up to the highest AC test voltage and must have a low inductance in order to transmit the PD signal without incepting any oscillation disturbance. In terms of capacitance value, the coupling capacitor shall have sufficiently high capacitance in order to not be affected by stray capacitances. Hence, the ratio ???? /???? greater than 0.1 is suggested. 

Figure 4 – Test circuit #1

The coupling capacitor, ????, the device under test (DUT), ????, and the coupling device comprise the high-frequency current loop in which the PD pulse current is intended to entirely circulate through. The blocking filter, ??, is responsible for impeding the PD pulse current to create other loop as well as blocking HF noise signals originated at the HV source from entering the measuring loop. Both features increase the signal-to-noise ratio, SNR, therefore improving the sensitiveness of the measurement. 

A variation of the test circuit illustrated at Figure 4 is shown at Figure 5. In this circuit, the coupling device is no longer placed in series with the coupling capacitor, but instead placed in series with the DUT. This modification guarantees a better sensitivity of the PD detection as all PD pulse current generated at the DUT is going to pass through the coupling device in its entirely and therefore increasing even further the SNR. Although this modification has no significant impact in filtering noise from the source, the SNR is increased due to the loss of signal from the test circuit to the source and/or stray capacitances is diminished to a negligible level.

The circuit under analysis has two downsides. First, the coupling device and the measuring instrument may be severely damaged in case of a major failure of the test object and lastly, the grounding connection of the DUT must be temporally discontinued so that the coupling device can be installed. The former downside can be mitigated by properly protecting the input of both coupling device and measuring instrument with spark gaps, surge arresters or any other fast actuation over-voltage protective device.

Figure 5 – Test circuit #2

The last main test circuit is undoubtedly the one which provides the best SNR, filtering of source noise and all other kinds of external noises, as well as filtering of interference generated in the test circuit (corona, loose contact sparking, etc.), among all other test circuit. The balanced test circuit (illustrated at Figure 6) uses the method of common mode filtering to attenuate common mode noises and interference and also to boost non-common mode signals, for instance, PD signals. 

The test circuit comprises a two-arm measuring instrument with adjustable input impedances in order to tune the overall impedance of each arm so that both impedances match each other. As both arms are subjected to the same voltage, by matching the overall impedance, the current passing through each arm is also matched. When the current matching is achieved, a high common mode rejection is assured.  

Common mode rejection works as follows: common mode noises, i.e. noises impacting both arms equally, when passing through ????1 and ????2 and thus passing ????1 and ????2 appear at same polarity at both input terminals of the measuring instrument. The input terminals are connected to a differential amplifier which amplifies signals of opposite polarities and attenuates signals of same polarity. 

In the case where the measuring instrument does not comprise adjustable impedances, the capacitance values of both arms must be at least of the same order and preferably the dielectric dissipation factor values must be similar. In the case of not matching impedances, the maximum rejection ratio achievable is 3 whilst for identical and well screened test objects, the rejection ratio can be as high as 1000 or even higher. 

2.4. CALIBRATION 

As mentioned in the item 2.2 of this article, the reading of the measuring instrument is proportional to apparent charge. This proportionality is dependent of the test object, coupling device and coupling capacitor, so in order to withdraw this dependency, the test circuit must be properly calibrated by the injection of a known charge across the terminals of the test object.

The device responsible for injecting such known charge is the PD calibrator. The PD calibrator comprises a step voltage generator along with a charging capacitor. The step voltage source charges the charging capacitor (which has a known and stable capacitance value, ??0) by applying a step voltage with a known amplitude, ??0, and thereupon the calibration charge is calculated as follows:  

This charge is thereafter discharged in test circuit which responds with a voltage signal appearing in test object as per:

The IEC [1] names the referred proportionality factor as scale factor and defines it as the “factor by which the value of the instrument reading is to be multiplied to obtain the value of the input quantity”. Accordingly: 

IEC [1] also specifies that the scale factor determined during the calibration shall be constant all over the range of 50% to 200% of the specified PD magnitude, i.e. ???? = ??0, and consequently it can be used during the PD measurement test without compromising the results.  

The measured apparent charge is as follows:

 As previously detailed, in the case of a real PD occurrence, the apparent charge related to this event is the charge that promotes a voltage drop, ??2, in the terminals of the test object, so: 

According to IEC [1], the PD calibrator shall be connected in parallel with the test object as shown at Figure 7 and Figure 8.

Figure 7 – Test circuit #1 with PD calibrator connected

Figure 8 – Test circuit #2 with PD calibrator connected 

The standard does not make any reference of calibration connection for the test circuit #3 (balanced circuit) however, the concept is globally valid. The PD calibrator shall be connected in parallel to the terminals of the test object (or one of them, in case of two test objects). 

The calibration charge is injected into the test circuit by the discharge of ??0. Such charge is transferred from one electrode to the other of ??0, through the test circuit. The calibration charge is distributed among ???? and ????, prorated by their capacitance values  

In the item 2.2, it was defined that the apparent charge is the charge value calculated by the integration over time of the pulse current generated by the voltage difference between ???? and ????. This voltage difference was caused by the voltage drop across ???? due to the unbalancing of charges after the charge in ???? is lost in the spark gap. In an equivalent way, the same response of the test circuit is expected if the unbalancing of charges is provoked by the insertion of a known charge, the calibration charge. Consequently, the current passing in the branch comprising the coupling capacitor is measured by the coupling device and its integral calculated by the measuring instrument. For this reason, the PD calibrator shall be always connected in parallel with the terminals of the test object and no other way else. One may notice by analyzing the Figure 7 and Figure 8 that, regardless of the connection of ???? (in the grounding of ???? or ????), the pulse current from ???? is always passing through ???? before reaching the negative output of the PD calibrator. If the calibrator is connected between the terminals of ???? instead, the referred current will never pass by the coupling device and therefore not exciting any proper reading at the measuring instrument. 

In regarding of the charging capacitor of the calibrator, its capacitance value must considerably smaller than (???? + ????) so that the influence of the test circuit during the charging of ??0 is negligible. If this condition is not met, as ??0 and (???? + ????) are in series when seen by the terminals of the step voltage generator, the calibration charge is not entirely transferred to the charging capacitor and it cannot be guaranteed as equals to ??0. So, IEC [1] requires the following condition be satisfied:  

??0 < 0.1 ? (???? + ????)

3.CONCLUSION

This article is intended to serve as guide for the understanding of partial discharge measurement.

I would be pleased to engage in further discussion of this and other topics related to the matter of electrical testing. Please send me a private message if you are like-minded.