TVLSI Spotlight Articles from 2024

Dear IEEE TVLSI?Readers,?

The IEEE Transactions on Very Large Scale Integration (VLSI) Systems is proud to present spotlight articles from 2024 Q3-Q4. We hope you enjoy reading the latest research.?

Best Regards,?

The IEEE TVLSI?Editorial Team

Mircea Stan (Editor-in-Chief)

Xinfei Guo (Associate Editor-in-Chief)

Stacey Weber (Journal Administrator)

2024 QUARTER 3

JULY - SEPTEMBER 2024

July 2024 Papers

Factored Systolic Arrays Based on Radix-8 Multiplication for Machine Learning Acceleration

Authored by: Kashif Inayat;?Inayat Ullah;?Jaeyong Chung

Page(s):?1205?- 1215, Volume: 32,?Issue: 7, July 2024 Read more

FTC: A Universal Framework for Fault-Injection Attack Detection and Prevention

Authored by:?Md Rafid Muttaki;?Md Habibur Rahman;?Akshay Kulkarni;?Mark Tehranipoor;?Farimah Farahmandi

Page(s):?1311?- 1324,?Volume: 32,?Issue: 7, July 2024 Read more

Design Exploration of Fault-Tolerant Deep Neural Networks Using Posit Number Representation System

Authored by:?Morteza Yousefloo;?Omid Akbari

Page(s):?1350?- 1363,?Volume: 32,?Issue: 7, July 2024 Read more

August 2024 Papers

An 112-Ch Neural Signal Acquisition SoC With Full-Channel Read-Out and Processing Accelerators

Authored by: Zijian Tang;?Yongxiang Guo;?Minqian Zheng;?Chao Sun;?Yusong Wu;?Runjiu Fang;?Ying Fang;?Milin Zhang

Page(s):?1461?- 1471,?Volume: 32,?Issue: 8, August 2024 Read more

ALT-Lock: Logic and Timing Ambiguity-Based IP Obfuscation Against Reverse Engineering

Authored by: Jonti Talukdar;?Woo-Hyun Paik;?Eduardo Ortega;?Krishnendu Chakrabarty

Page(s):?1535?- 1548,?Volume: 32,?Issue: 8, August 2024 Read more

Symmetric and Multiphase-Interleaved Ladder Bucks for DC Capacitors Elimination

Authored by:?Loai G. Salem

Page(s):?1554?- 1558,?Volume: 32,?Issue: 8, August 2024 Read more

September 2024 Papers

Thermally Constrained Codesign of Heterogeneous 3-D Integration of Compute-in-Memory, Digital ML Accelerator, and RISC-V Cores for Mixed ML and Non-ML Workloads

Authored by:?Yuan-Chun Luo;?Anni Lu;?Janak Sharda;?Moritz Scherer;?Jorge Tomas Gomez;?Syed Shakib Sarwar,?Ziyun Li,?Reid Frederick Pinkham,?Barbara De Salvo,?Shimeng Yu

Page(s):?1461?- 1471,?Volume: 32,?Issue: 8, August 2024 Read more

Deep Reinforcement Learning-Based Power Management for Chiplet-Based Multicore Systems

Authored by:?Xiao Li;?Lin Chen;?Shixi Chen;?Fan Jiang;?Chengeng Li;?Wei Zhang;?Jiang Xu

Page(s):?1726?- 1739,?Volume: 32,?Issue: 9, September 2024 Read more

A 28-nm Dual-Mode Explicit Class-F?? VCO With Low-Loss CM Return Path Achieving 70–400-kHz 1/f3 PN Corner Over 4.9–7.3-GHz TR

Authored by: Shan Lu;?Danyu Wu;?Xuan Guo;?Hanbo Jia;?Yong Chen;?Xinyu Liu

Page(s):?1749?- 1753,?Volume: 32,?Issue: 9, September 2024 Read more

2024 QUARTER 4

OCTOBER?- DECEMBER?2024

October 2024 Papers

M2M: A Fine-Grained Mapping Framework to Accelerate Multiple DNNs on a Multi-Chiplet Architecture

Authored by:?Jinming Zhang; Xuyan Wang; Yaoyao Ye; Dongxu Lyu; Guojie Xiong; Ningyi Xu;? Yong Lian;?Guanghui He

Page(s):?1864?- 1877,?Volume: 32, Issue: 10, October 2024 Read more

Protecting Parallel Data Encryption in Multi-Tenant FPGAs by Exploring Simple but Effective Clocking Methodologies

Authored by:?Yankun Zhu; Pingqiang Zhou

Page(s):?1919?- 1929,?Volume: 32,?Issue: 10, October 2024 Read more

November 2024 Papers

Power-Efficient Analog Hardware Architecture of the Learning Vector Quantization Algorithm for Brain Tumor Classification

Authored by:?Vassilis Alimisis;?Emmanouil Anastasios Serlis;?Andreas Papathanasiou;?Nikolaos P. Eleftheriou;?Paul P. Sotiriadis

Page(s):?1969?- 1982,?Volume: 32,?Issue: 11, November 2024 Read more

MCAIMem: A Mixed SRAM and eDRAM Cell for Area and Energy-Efficient On-Chip AI Memory

Authored by:?Duy-Thanh Nguyen; Abhiroop Bhattacharjee; Abhishek Moitra; Priyadarshini Panda

Page(s):?2023?- 2036,?Volume: 32,?Issue: 11, November 2024 Read more

A Novel TriNet Architecture for Enhanced Analog IC Design Automation

Authored by:?Arunkumar P Chavan; Shrish Shrinath Vaidya; Sanket M. Mantrashetti; Abhishek Gurunath Dastikopp; Kishan S. Murthy; H. V. Ravish Aradhya;?Prakash Pawar

Page(s):?2046?- 2059,?Volume: 32, Issue: 11, November 2024 Read more

A 28 nm 16-kb Sign-Extension-Less Digital-Compute-in-Memory Macro With Extension-Friendly Compute Units and Accuracy-Adjustable Adder-Tree

Authored by:?Xin Si; Fangyuan Dong; Shengnan He; Yuhui Shi; Anran Yin; Hui Gao Page(s):?2164?- 2168,?Volume: 32,?Issue: 11, November 2024 Read more

Functionally Possible Path Delay Faults With High Functional Switching Activity Authored by:?Irith Pomeranz;?Yervant Zorian

Page(s):?2159?- 2163,?Volume: 32,?Issue: 11, November 2024 Read more

December 2024 Papers

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IEEE Transactions on Very Large Scale Integration (VLSI) Systems?covers design and realization of microelectronic systems using VLSI/ULSI technologies that require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels.