I have pointed out before that you really only get two opportunities a year to get briefed on TSMC's roadmap. One of those is OIP, technically the Open Innovation Platform Ecosystem Forum. This year it is going to be in-person at the Santa Clara Convention Center on October 26th. It will then be an online VOD event on November 10th. If you are in Europe, it will take place on November 8th at?Hilton Amsterdam Airport Schiphol, with the online VOD event on November 15th.
At both events, you will hear about:
- Emerging advanced node design challenges and corresponding design flows and methodologies for N3/N3E, N4/N4P, N5/N5A, N6/N7, N12e, N22, and 28eF technologies
- Latest 3DIC chip stacking and advanced packaging processes, and innovative 3DIC design enablement technologies and solutions targeting HPC and mobile applications
- Updated design solutions for specialty technologies enabling ultra-low voltage, analog migration, mmWave RF, and automotive designs targeting automotive and IoT designs
- Ecosystem-specific TSMC reference flow implementations, P&R optimization, machine learning to improve design quality and productivity, and cloud-based design solutions
- Successful, real-life applications of design technologies and IP solutions from ecosystem members and TSMC customers
The big-picture schedules for the US is as below. Europe has the same schedule, but everything is 30 minutes later:
