Tips for effective Memory Verification

Mike BARTLEY Mike BARTLEY

Mike BARTLEY

SVP at Tessolve Semiconductors Part-time Consultant for Alpinum Consulting and Training

发布日期: 2016年8月17日
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Increasingly complex bus, interface and memory access protocols are being used in SoCs to help meet demands to integrate more hardware functions and supporting software within tight power budgets.

Verification IP (VIP) can help, especially for memory implementations, providing tools that enable verification engineers to verify that memory-controller implementations comply with standards.This article from Tech Design Forum describes the tips for choosing the right memory VIP for your applications.

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Find out how T&VS Verification IP services helps verification engineers access to the industry’s latest protocols, interfaces and memories required to verify their SoC designs

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