StorAIge: Embedded storage elements on next MCU generation ready for AI on the edge

StorAIge: Embedded storage elements on next MCU generation ready for AI on the edge

StorAIge is an ECSEL Joint Undertaking* funded project which started on June 2021. Led by STMIcroelectronics in Crolles (France), this 3 years-project gathers 40 European partners with high-level skills and expertise to share insights, concepts, ideas, experiments, studies to develop ‘appropriate’ and standard-grade Artificial Intelligence (AI) solutions. BENKEI supports the management of the project and the communication, dissemination and exploitation of the results.

AI is now being used in an ever-growing range of applications and provides tangible solutions in many societal challenges. Europe leads the market in electronic components and systems. Several billions of microcontrollers, sensors and communication devices are sold annually by European players. The next step is AI-enabled Electronic Components and Systems at the edge.

With a budget close to € 100M and a European grant of € 24.9M, StorAIge aims at developing and industrializing FDSOI 28nm and next generation embedded Phase Change Memory (ePCM) world-class semiconductor technologies, enabling competitive AI for Edge applications.

Computing systems consume a significant amount of energy, with up to 90% being used for data storage and transfer. To address this issue, non-volatile memories like PCM are utilized as they can store information even when not powered, thereby reducing energy consumption. Additionally, these memories, when coupled with AI processing power, can perform preliminary data selection at the edge with a very good efficiency, allowing for the transfer of only useful and pre-processed data. The FDSOI (Fully Depleted Silicon On Insulator) technology developed by CEA offers a new architecture for transistors, which can meet the challenge of miniaturisation, while combining performance and low energy consumption. It promises to be essential for mobile electronics, autonomous cars, or the Internet of Things - in other words, wherever, depending on the situation, the processor has to arbitrate between raw power and energy savings.

The StorAIge work plan structure follows “a value chain like” approach, where the activities and developments of the overall project are driven by the applications requirements, i.e. the end users and the technologies and System on Chip related developments.

The path is to go from first requirements, specifications and design phases up to the final products and systems production and qualification (see Figure 1).

Figure 1:

The main challenge addressed by the project is on one hand, to handle the complexity of sub-28nm ‘More than Moore’ technologies and to bring them up at a high maturity level, and on the other hand, to handle the design of complex Systems on Chip so they can be more intelligent, secure, flexible, low power consumption and cost effective. The project is targeting chipset and solutions with very efficient memories and high computing power, targeting 10 Tops per Watt.

Three main applications areas are targeted within the project: Automotive, Industry and Security. Among them, nine specific applications will be studied: AI powered equipment, AI augmented system targeted for power control applications, unmanned/automated vehicle subsystems, predictive maintenance and condition monitoring, gesture recognition, secure applications, AI based sensor fusion subsystems, infrared sensors, and auto MCU applications. For each application, one or several use cases will be demonstrated, leading to prototypes (see the 15 use cases in Figure 2).

Figure 2: StorAIge Project: 9 applications and 15 use cases

The first two years have been prolific with numerous technical results, communication and dissemination activities, illustrating the consortium’s productivity and involvement. Many prototypes are already available and promising. 55 scientific papers have already been published! To celebrate and share this success with a broader audience, StorAIge has been selected to participate to the "Walk of fame" of the Chips JU Launch Event on 30/11-01/12/2023.

The project is now entering its third and final year. Next steps will focus on finalising the activities specifically around the 15 use cases, disseminating the results and assessing the exploitation and the impact of the project.

By providing the best-in-class silicon-based solutions and joining forces of the AI value chain in the EU, StorAIge will help:

  • to predict and define the tasks to which AI will be applied in edge devices tomorrow,
  • to support their widespread adoption,
  • Europe to maintain strong competitiveness and sovereignty.


In this project, BENKEI is represented by Laurence Naiglin.

Laurence Naiglin, PhD

More info on StorAIge: ?https://storaige.eu/

More information on BENKEI: https://www.benkei.fr/en/home/ ?

*About ECSEL JU: The ECSEL Joint Undertaking - the Public-Private Partnership for Electronic Components and Systems – funds Research, Development and Innovation projects for world-class expertise in these key enabling technologies, essential for Europe's competitive leadership in the era of the digital economy. Through the ECSEL JU, the European industry, SMEs and Research and Technology Organisations are supported and co-financed by 30 ECSEL Participating States and the European Union. ECSEL JU became KDT JU on 30/11/2021 and is now CHIPS JU.

Acknowledgement: This project has received funding from the ECSEL Joint Undertaking (JU) under grant agreement No 101007321. The JU receives support from the European Union’s Horizon 2020 research and innovation?programme and France, Belgium, Czech Republic, Germany, Italy, Sweden, Switzerland, Turkey. ? ? ? ?

Disclaimer: The European Union is not responsible for any use that may be made of the information any communication activity contains. The content of this publication does not reflect the official opinion of the European Union. Responsibility for the information and views expressed in the therein lies entirely with the author(s)

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