Still Using Test Technology Developed in the 1980s?

Just because it still works, doesn’t mean there isn’t a better way.? Many executives underestimate the?potential benefits of updating their PCB test strategy. ?Much of this hesitation lies in the nature of test – It’s seen as a no value-added process, so why would I invest to improve it???

Great Question!? Since test is a ‘no value-added’ activity, our objective should be maximum efficiency:?

• Confirm the Manufacturing Process and Product Functionality?
• Minimize Overall Cost (Labor, Capital Expenditures, and Tooling)?
• Don’t let Test be the Bottleneck?
• Minimize Rework by Catching Errors Quickly
• Avoid Human Handling to Reduce Mistakes and Induced failures?

Treat Test like just another manufacturing step.? Optimize your process, improve your quality, reduce your costs, and increase your efficiency.?

For many manufacturers, speeding up an old test process so that it keeps up with the current SMT line provides the primary objective of a new test strategy, which is increased speed.? SMT lines are 10x faster than before, so test needs to speed up or it will become the bottleneck in your process.?

How does Parallel Test Improve Efficiency?? Here’s a recent customer project that compares traditional methods to Parallel Test:

10-UP PANEL OF AUTOMOTIVE BOARDS

• Annual volume is just over 2 million boards per year?
• The SMT line produces the boards at a rate of 1 panel every 30 seconds, so, 20 boards per minute.??
• Demand for this board is quite steady, so a daily?6-hour production run makes around 7000 boards.??

Unfortunately, the test process is much slower.?Currently, testing is accomplished with a big iron ICT system and on-board programming and separate functional test stations

Summary of Current Process

• One?10-up?panel takes?45?seconds to?test and program, then the panels are broken apart and each board is tested functionally.??
• The longest step?of the functional test is a?LIN?communications test that takes?50?seconds per 10-up?panel.
• Including handling time, the current test throughput is approximately?180?boards per hour?or?7X slower?than the SMT line.??
• To compensate, test is conducted on?3 ICT systems?and?3 Functional test systems?over?2 shifts?with?12 operators.

Status Quo can be Risky:?Because the test process is slower than the SMT line, thousands of boards are built to WIP each day, creating a risk that any?manufacturing error would require?rework of thousands of boards.? Also, the current system is very expensive.?

A modern approach with a faster Quad-Core ICT System, that can also perform the LIN Test in Parallel?(for all 10 boards simultaneously) is fast enough to keep up with the SMT Line.?

This solution removes the risk of having thousands of boards in WIP, since there is no WIP.? It eliminates all labor if an inline solution is selected or all but one operator if a manual solution is preferred.? As well as, from a capital perspective, lots of expensive hardware?(2 ICT systems and 3 FT systems)?do not need to be purchased. ?All told, the parallel test strategy saved over $500,000 in the first year.?

So, why are most manufacturers still testing the old way?? Simple, because it has worked for 25 years,?and it still works.??Only if test is viewed as a process to be optimized will improvements be found.? Most steps in technology manufacturing are undergoing constant improvement, but test has been stuck with ‘good enough’ for decades.?

For many projects, the benefits of a Parallel Test Strategy are significant.? CheckSum has a suite of parallel test technologies (ICT, on-board programming, and Functional Test) that enable manufacturers to develop specific solutions for each project which optimizes the efficiency of the testing process.

Find out more about how you can improve your process with parallel PCB test: