Steps and advantages of chip packaging technology

If you have a chip in your hand, you must fix this chip on a circuit board or other substrate to achieve the normal output of the chip's performance. There are three most common methods that can be used.：

The first is to connect through a lead wire, and a gold wire with good conductivity is used to connect the chip pins to the circuit, which is called wire bonding.

The second is the pin bonding technology, which converts the gold wire into copper foil, and the copper foil fits with the bumps of the chip pin, which is called TAB.

The third is flip-chip technology, which connects the conductive bumps on the chip with the bumps on the circuit board through a certain process, called Flip chip.

As semiconductor is becoming more and more integrated, smaller in size and higher in performance, reverse welding technology has been more and more widely used.

The flip chip process refers to the direct deposition on the I/0 pad of the chip, or the deposition of bumps (including tin-lead balls, lead-free tin balls, copper-lead bumps and gold bumps, etc.) after RDL wiring, and then the chip is flipped and heated to combine the molten solder with the substrate or frame to fan out the I/0 of the chip into the required packaging process. The schematic diagram of the flip chip packaging product is shown in the figure.

Flip chip technology was first developed by IBM in the 1960s, and large-scale mass production was formed in the late 1990s. It is mainly used in high-end products (such as CPUs, GPUs, etc.). With the emergence of copper column bump technology, combined with the rapid development of consumer smart electronic products (such as mobile phones, wearable products, etc.) and the demand for product performance, more and more products have shifted from traditional lead bonding packaging to flip chip packaging. Chip packaging.

Compared with the traditional lead bonding process, the flip chip packaging process has the following advantages.

(1) High VO density.

(2) Due to the use of bump structure, the interconnection length is greatly shortened, the resistance and inductance of the interconnection line are smaller, and the electrical performance of the package has been greatly improved.

(3) The heat generated in the chip can be directly transmitted to the package substrate through solder bumps, so the chip temperature will be reduced.

Flip chips include many different process methods. At present, the bump technologies of flip chips in the industry mainly include gold bumps, tin bumps and copper column bumps, and the corresponding welding processes are mainly ultrasonic hot-pressing welding, reflow soldering and hot-pressing welding. Due to the development of technology and different products, the underfill process is mainly divided into capillary underfill, plastic underfill, non-conductive glue (NCP) or film (NCF) underfill. The figure shows a schematic diagram of the bumps.

As the wafer CMOS process continues to develop in the direction of high density such as 16nm, 10nm, and 7nm, the density and performance requirements of the chip V0 are getting higher and higher, which requires the product to adopt a flip-chip process to meet the needs of the chip. Flip chip requirements for packaging technology and reliability in terms of high-density micro-bump technology, small pitch flip chip bonding technology and underfill technology are also getting higher and higher. Each process method is different, and the scope of application is also different. For example, in terms of the choice of circuit board or substrate type, whether it is an organic material, a ceramic material or a flexible material, it determines the choice of assembly materials (including bump type, flux underfill material, etc.), and to a certain extent it also determines the choice of required equipment. Therefore, in the future, the packaging of flip chips needs to combine product application, chip design, packaging design, packaging materials, packaging equipment and packaging technology to jointly select the process combination in order to find the optimal packaging solution.

Nowadays, flip chip technology has been widely used in the field of consumer electronics, and it will be more widely used in the Internet of Things, automotive electronics, big data, etc. In the future. Flip chip packaging is considered to be a process necessary to promote the manufacture of low-cost and high-density portable electronic equipment.

The flip chip is mainly completed in four steps：

The first step: metallization of the bottom of the bump (UBM=under bump metallization)

Bump metallization is to draw out the properties of the P-N junction in the semiconductor. Among them, the most suitable bump material for the connection of the hot-pressed chip is gold. Bumps can be generated by traditional electrolytic gold plating methods, or the nail head bump method is used. The latter is the bump formation process commonly used in lead bonding technology.

The main deposition methods of UBM are：

Sputtering: The method of sputtering is used to deposit a thin film on the silicon wafer layer by layer, and then the UBM pattern is formed by photographic lithography, and then the part that is not the pattern is etched off.

Evaporation: Using a mask, the silicon wafer is deposited layer by layer by evaporation method. This selective deposition mask can be used in the formation of corresponding bumps.

Electroless plating: The method of electroless plating is used to selectively plating Ni on the Al pad. The Al surface is often treated by the zincate process. No need for vacuum and pattern etching equipment, low cost.

Step 2: Chip bumps

This part is the formation of bumps, which can be seen as making electrodes for the P-N junction, which is similar to processing an output terminal for a battery.

6 common ways to form bumps:

Evaporation solder bumps,

Electroplating solder bumps,

Printed solder bumps,

Nail head solder bumps

Put the ball bump

Solder transfer bumps

Judging from the bumps of a typical electroplating solder, the processing diagram is as follows：

The completed bumps are observed under a scanning electron microscope, and the microscopic form is a metal ball of uniform shape.

The figure below shows the comparison before and after the bumps are formed. It is a cylinder before reflux heating, and the metal material melts after heating to form a spherical melting electrode.

Step 3: Assemble the already convex wafer onto the substrate/board

In the hot pressing connection process, the bumps of the chip are connected to the pads of the substrate by heating and pressurizing.

This process requires that the bumps on the chip or substrate are gold bumps, and at the same time there must be a surface that can be connected to the bumps, such as gold or aluminum. For gold bumps, the general connection temperature is about 300℃, so that the material can be fully softened and the diffusion effect in the connection process can be promoted at the same time.

Step 4: Use non-conductive materials to fill the pores at the bottom of the chip

When filling, the flip chip and the substrate are heated to 70 to 75℃, and an L-shaped syringe equipped with the filler is used to inject the filler in both directions along the edge of the chip.

Due to the siphoning effect of the capillary of the gap, the filler is sucked in and flows to the center.

There are barriers at the edge of the chip to prevent outflow. Some use the method of tilting the substrate to facilitate flow. After filling, heat up in stages in the oven, and after reaching a curing temperature of about 130℃, keep it for 3 to 4 hours to achieve complete curing.

The following is a schematic diagram of the filling：

After the glue filling is completed, the chip and the substrate are stably combined, and the schematic diagram after completion：

Summary

After the above four-step process, the flip-chip connection between the chip and the substrate is completed. Although it is not complicated to introduce, it is still a systematic project to complete these processes completely. The flip-chip structure is composed of a sapphire substrate, an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer and an electrode from top to bottom. Compared with the formal structure, the heat generated at the PN junction in this structure can be directly transmitted to the heat sink without passing through the substrate, so the heat dissipation performance is good, and the chip's luminous efficiency and reliability are high; in the flip-chip structure, the p electrode and the n electrode are both on the bottom surface, avoiding the blocking of the outgoing light, and the chip's light output efficiency is higher; in addition, the distance between the electrodes of the flip-chip is long, which can reduce the risk of short circuit caused by electrode metal migration.