SOC perf/watt : peripheral devices and memory controller DVFS, HW & SW design
CPU freq scaling framework is well stabilized by tying the freq scaling request from scheduler in SW and designing apt HW to control scaling latency and voltage stabilization
Best perf per watt can't be achieved until memory frequency is not dynamically scaled independently.
Like as memory DVFS, to achieve best SOC perf / watt, there is __MUST__ need of HW and SW component which scales freq and voltage to cater two main requirements -
- How fast device freq can be scaled based on device workload
- How independently voltage can be scaled without affecting other voltage rails in SOC
This article talks about HW design and SW implementation for non CPU DVFS to achieve best perf/watt
Stay tuned....