Set Black boxes in Functional ECO

In functional ECO processes, encountering complex modules that pose challenges for successful Logic Equivalence Checking (LEC) is a common occurrence. For instance, certain modules unrelated to the ECO task might involve operations like retiming, necessitating the use of the Sequential LEC tool to establish logic equivalence. Additionally, some unrelated modules could impose lengthy runtime requirements for logic equivalence verification. Executing the automatic ECO flow directly on the design under these circumstances could lead to either excessive time consumption or the generation of redundant fixes.

GOF ECO addresses this issue by employing the set_blackbox API to designate these intricate modules as black boxes within the functional ECO context. By marking these modules as black boxes, computational efforts are not expended on them. This strategic approach significantly expedites the ECO procedure and mitigates the risk of introducing incorrect ECO corrections.

The API can be added before fix_design. An example code is shown below.

# GofCall ECO script, set_blackbox Example
use strict;
setup_eco("eco_blackbox");# Setup ECO name
read_library("tsmc.lib");# Read in standard library
read_design('-ref', 'REF_NETLIST.v'); # Read in synthesized netlist 
read_design('-imp', 'IMP_NETLIST.v'); # Read in netlist under ECO
set_top('SOC_TOP'); # Set the top module
set_blackbox("SUB_MOD3", "-hier");
fix_design;
write_verilog('ECO_NETLIST.v'); 
exit;        

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