Semiconductor Design and IP Lifecycle Management

Design reuse is certainly not new to semiconductor design. However, with time to market pressures, limited resources and the requirement to adhere to FuSA (Functional Safety) and ISO26262 standards for automotive chip design, the pressure is on for organizations to redefine what reuse with full design traceability looks like. This article shall attempt to shine a light on linking Requirements Management, Design Management, and Verification Management to create a fully traceable design and verification process.

Let us first establish the flow from requirements to a product. New product design will start with a set requirements. Once the requirements are captured and understood, an architectural specification is created and shared with the design team. The design team begins the process of designing the product. The same set of requirements are also used to create a functional verification plan to be used by the verification team, which is responsible for ensuring the design meets the requirements and the design runs as expected.  Issue and defect systems are used to track issues and communicate them back to the stakeholders. Software can be broken down into the following areas, all managed with separate software solutions which do not communicate with each other:

• Requirements Management
• Design Data Management
• Verification and Test Management
• Issue and Defect Tracking

So let's define what IP (Intellectual Property) is. It's not just the external IP you have purchased, or the IP you are creating or reusing on your design, it is every functional element that you design and the scripts and environment used for that design. If you are going to provide full traceability across all phases of design: requirements management, data management, verification management and issue and defect tracking, you are going to need a platform that links all these solutions.

The Methodics Percipient IP Lifecycle Management Platform (IPLM), allows design teams to work in their current environment with existing requirements management, data management, verification management and issues and defect tracking solutions by connecting the data to track each and every release of IP. When Percipient creates a new release of a design project, the bill of materials (BOM) associated with the release includes all of the specific files and versions of the project along with exact releases of dependent IPs.

Verification plans are based on the requirements used to specify the development of a product. Design and verification teams rely on a Requirements Management system to document the requirements needed for design and verification. Although requirements are managed efficiently at the beginning of a design, there is little to no linkage to and from the requirements system after architecture specifications and verification plans are developed. The Percipient Platform allows for the integration of different requirements management systems, so that any changes to requirements will be communicated to the design and verification teams. Additionally, when an issue is discovered requiring changes to the design, the requirements can be updated as needed.

Connecting verification to releases with all the associated metadata is imperative to delivering full traceability. The Methodics Percipient Platform enables connecting the verification environment and activity to specific design releases as part of the workflow. Since the Methodics Percipient Platform is used to manage user workspaces, it keeps track of everything associated with the release of the IP, ensuring traceability from requirements, through design, to verification.

You can find more about how the Methodics Percipient Platform takes semiconductor IP and Design Data Management to the next level at: https://www.methodics.com/products/projectic

If you are interested in obtaining our white paper Traceability for the Design and Verification Process written by Michael Munsey and Vishal Moondhra, you can email me at [email protected] or leave a note in the comments.