Seismic Shift #5: New Compute Trajectories for Energy-Efficient Computing

Computing based on today’s solutions will not be sustainable after 2030 as the energy requirements for that computing will outpace the energy available from the market. Computing will be in an energy-limited regime and will not grow, drive new markets, or spur global GDP growth. To ensure advancements in ICT are sustainable for future growth, we need to discover new compute trajectories and develop holistic energy-efficient solutions for information processing, sensing, communication, storage and security.

In the?first blog of this series, we discussed how the use of the information and communication technologies continues to grow without bounds, dominated by the exponential creation of data that must be moved, stored, computed, communicated, and secured. We also talked about the number of bit transitions per second (BITS), which are performed while executing computing instructions, measured in millions of instructions per second (MIPS). Then, we explained how the ever-rising energy demands for computing versus global energy production are creating new challenges; and therefore necessitating the development of new compute trajectories that would result in dramatically improved energy efficiency of computing.

Compute Trajectory

What is a compute trajectory? It is the way in which we convert binary transitions in compute instructions, e.g. how we convert BITS into MIPS. For example, for a semiconductor central processing unit (CPU) one can plot the overall computational performance measured in MIPS as a function of the CPU’s binary throughput (BITS), which represents a characteristic number of “raw” binary transitions needed to implement an instruction. Put simply, BITS is proportional to the product of the number of transistors and the clock frequency of the CPU, and MIPS is the CPU’s computational performance that can be executed against a standard set of benchmarks.

Now, when we plot these data for a variety of CPU chips produced in 1971–2019 by different companies, such as Intel, AMD, IBM, Motorola, DEC, and others, we find that the CPU compute trajectory (which is the dependency of MIPS on BITS) is described by a power formula (shown as an inset in the figure below) with an exponent p~?. Note the surprisingly strong correlation — the determination coefficient R2=0.96!

This formula allows us to calculate the total number of bit transitions required for computing per year, based on the known world’s technological information processing capacity. And since we know the energy per one bit transition, we can obtain the total energy the world is using for computing each year. For example, ~10^36 “raw” bits have been processed in computers in 2020. The energy per bit is ~10 attojoules or 10^-17 J/bit in current processors, thus the total energy consumed for computing is ~10^36 bits ′10^-17 J/bit ~ 10^19 J (a more accurate calculation results in 4.9·10^19 J in 2020). The global energy production was ~6.2·10^21 J in 2020, thus approximately 4% of the world’s energy was used for computation. This percentage continues to grow, because ever-growing demands for computation drives the rise in global compute energy. As the compute energy vs. global energy production graph highlights in the first blog of this series, the total energy consumption by general-purpose computing is doubling approximately every three years, while the world’s energy production is growing only linearly, by approximately 2% a year. This, despite the fact that the energy per one-bit transition in CPUs has been decreasing over the last 40 years.

Why ? and how it matters?

Once again, the current CPU compute trajectory is described by a power formula, MIPS = k(BITS)p, where p=2/3.??And we don’t know why p=2/3! The theoretical basis for five decades of observed trajectory and for the value of the exponent is not understood, so the theoretical basis for computation needs further research. The strong BITS-MIPS correlation suggests a possible fundamental law behind the empirical observation. Why does this matter? Because this exponent dictates how many single-bit transitions are needed to implement a compute instruction, therefore greater p implies greater bit-utilization efficiency in computation. Obviously, computing with fewer bit transitions would result in lower energy of computation because every bit transition costs energy. As an observation, if it is possible to increase the exponent in the formula from ? to one (i.e. by ~50%), the compute efficiency, would have a 1,000,000x improvement, resulting in drastic reductions in energy usage. Thus, the main goal of future foundational research in computing is to understand the origin of the exponent p in the compute trajectory formula and how we can increase its value.

How can we get there?

We need to explore new approaches to computing with the focus on changing the current mainstream compute trajectory. Experts across the industry and academia are currently scratching their heads about the ? exponent in the compute formula and several research directions have been suggested as shown in the figure below. In future blogs, we'll discuss each of these directions in detail.

We can also derive some insight from biological computing where the smallest of systems (a single E. coli cell) to the most ?complex (the human brain) appear to follow a much more energy-efficient trajectory with p~0.9 (see figure below).

Overall, we need to stimulate collaborative research from materials to architecture and algorithms to establish revolutionary paradigms that support future energy-efficient computing for the vast range of future data types and different workloads.

The Decadal Plan for Semiconductors, outlines research priorities that can help us meet the needs of future generations. Developed by leaders across academia, government and industry, the report identifies five seismic shifts shaping the future of semiconductor technologies and calls for an annual $3.4 billion federal investment over the next decade to fund research and development across these five areas. Read the report: src.org/decadalplan

Watch the SIA/SRC Webinar Decadal Plan for Semiconductors: New Compute Trajectories for Energy Efficiency and read the webinar Q&A.

This article was authored by Robert Clark, Senior Member of the Technical Staff at Tokyo Electron and Victor Zhirnov, Chief Scientist at Semiconductor Research Corporation.