The Rohd To Rohme

A few weeks ago I saw a Linked Post about Rohd, which describes itself as "a framework for describing and verifying hardware in the Dart programming language". There is a good overview of Rohd in this paper by Max Korbel .

Rohd is written in the Dart programming language. Dart is a fairly new language in the C/C++/Java family of programming languages, and as such is relatively easy to learn if you are already familiar with one or more languages in that family. It has all the things you would expect of a modern programming language. According to wikipedia :

"Dart is an object-oriented, class-based, garbage-collected language with C-style syntax. It can compile to machine code, JavaScript, or WebAssembly. It supports interfaces, mixins, abstract classes, reifiedgenerics and type inference."

Seeing a hardware description language embedded in a modern programming language set my brain racing down memory lane. To be precise, it reminded me of the release of System 1.0 in ... well, sometime before February 2002, according to the Accelera website. SystemC 1.0 solved the problem of how to model time, hierarchy and connectivity in C++. It then added abstract ports later in the 2002, and eventually added TLM 2.0, which made it suitable to do System Level Modelling.

My immediate reaction was to wonder if Dart and Rohd would follow the same path of development, from hardware description to system level modelling. This lead me to look in a lot more detail at the underlying language, Dart. And what I found, I really liked. In particular, Dart has native support for asychronous behaviour. And this led me to the development of Rohme, the Rapid Object orientated Hardware Modelling Environment.

My first attempt at doing this took advantage of the native asychronous support in Dart to write the core event based simulation code in two hundred lines of code, including comments and a copyright notice. I was pretty impressed that it was possible to do this with so few lines of code. But then my second go reduced this to ... two lines of code ! During my explorations with Dart, I kept find that features that require quite a lot of hard work in other languages have already been throught of, and are implemented either in the core language or a previously published Dart package.

Apart from the generally 'advanced' nature of Dart, what makes Dart so suitable for RTL Design and System Level Modeling is that its support for asynchronous behaviour does not involve threads or a context switch. In this sense, it's like SystemVerilog - an asynchronous wait does not have a particularly big impact on simulation time. But we have this "no context switching wait" embedded natively in a modern programming language, in contrast to SystemVerilog, which at its core is a cut down version of Java as it was in 1999. And because there is no significant execution time penalty in doing a context switch, there is no need for the confusing and inaccuracy inducing Quantum / Temporal Decoupling in SystemC TLM 2.0, which is basically just a long workaround for the inefficiency of context switching in C++.

So far I have focused mainly on the purely programming aspects of using Dart for design and modelling. But precisely because Dart is a modern programming language, there is a whole ecosystem around it, including packages, test environments, code coverage tools, documentation tools and linters, which make the whole experience a pleasure and a massive contrast to working with SystemC or SystemVerilog. And more prosaically, compile times are blistering fast, and according to Max Korbel 's paper, so are the run times.

So please check out both Rohd and of Rohme. Let me know if you have a Damascene conversion.