RISC, CISC and RISC again
Changing computing architecture from one paradigm to another paradigm is a risky proposition. Apple is doing it again. This time it is RISC again. The underlying message is that the perceived stickiness of hardware architecture to software is relic of the past. The stuff that follows is my take on How, Why, Where and Whereto.
How
The seeds for this change had been sowed when LLVM crept into Apple ecosystem. LLVM allows an intermediate representation of instructions that later can be targeted to any architecture . Later comes swift that aims programmer productivity by borrowing good stuff from many contemporary high level languages. In the timeline this starts some where in 2007. It is a pretty long journey. In essence LLVM-SWIFT-RISC is the journey to reckon with. From ground up tool chains and language are built first to facilitate the hardware architecture transformation. It is indeed a carefully crafted long journey.
How: Programmer's Model
No matter what architecture it is, every hardware architecture exposes itself in terms of a programmer's model. A programmer's model is a bunch of memory locations with addresses that can be written into or read from. A write into a write able address that results in some action. A read from another address that has the content of the result of the action happened. This is one level below assembly. Here is where the abstraction of memory location disappears into micro-architecture. A software loses itself into hardware's mercy.
How: LLVM
LLVM commoditizes hardware architecture. There is no need to write code to target an architecture or an ISA. The code gets translated to LLVM IR. The IR will get translated into Architecture specific code. It is an abstraction sitting in between the hardware and the software. For the uninitiated, the drive train does not matter. A petrol car, diesel car and an electric vehicle drives the same way. That means a pedal for acceleration and another one for deceleration. The abstraction here is just the pedals.
Why
A picture is worth 1000 words. The picture for this write up shows the marketing pitch of A12 bionic chip. There are roughly 20+ notable IPs (Intellectual Properties) in the same piece of silicon. No wonder why it is called Apple Silicon. Per Walter Isaacson, the journey began with iPad and later gave way to the cash cow (iPhone). SOCs are attractive proposition to distinguish a product from its competitors. It offers the flexibility that vertically integrated chip houses can't provide. In the software world, if there is performance critical code then it gets written in 'C' or assembly.
With a custom SOC, product differentiation can be achieved by pushing software into hardware IPs or custom hardware IPs that provide necessary performance boost. Let us travel back in the memory lane. The Apple A4 SOC contained 3 distinct pieces of IPs (An ARM CPU, PowerVR GPU and memory).
Why: Slowing Moore's Law
For many years the Moore's law withstood the test of time. The reduction in transistor size and its positive effect on computational power made general purpose processors good enough for all work loads. Later rendering images demand for specialized computing, gave birth to GPUs. It is an architectural departure.
Why: Custom
All IP vendors amortize their cost across many different customers. This is where the leverage comes into play. The number game sets in. 2 cents per dollar is an extremely insignificant amount for a dollar. A startup wants to use as many 3rd party IPs as possible to drive down the cost. A behemoth, like apple, looks at product differentiation at all levels of abstraction. Being a software + hardware product, it makes more sense to increase the percentage of its own IPs to keep the competition at bay. Off loading complexity to specialized hardware is a costly proposition. It is a privilege only a few can undertake.
Whereto
In today's plethora of available hardware context, the one true operating system that supports all ISA is Linux. Apple caught up with it with iPhone and iPad, so they have good head start in terms of supporting two architectures and abstracting it out over the period of time.
On the surface RISC-V is no different. It is a yet another RISC architecture that pins its bet on open and free. But as a geopolitics immune architecture, it is a suitable hedge against ever changing tectonic shifts in politics. For now the world runs on x86 and ARM, predominantly. RISC-V is a distant entrant with a hope.