The Report of Simulation’s Death was an Exaggeration
Mike BARTLEY
SVP at Tessolve Semiconductors Part-time Consultant for Alpinum Consulting and Training
The verification of blocks and IP is undergoing significant change and the verification experts have some diverse opinions on the way forward including the role of simulation. Tom Anderson, VP of Marketing describes how Breker’s graph-based scenario models figured out the integration of the unit verification environment into the system verification environment.
Read More
Find out how T&VS extends the value of simulation with efficient, automatically generated test cases, vertical reuse from IP to SoC, and seamless horizontal reuse to hardware.