Ralf’s GaN & SiC News (October 10, 2024)
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Silicon Carbide News
TechInsights looks under the hood of Infineon’s 400 V SiC MOSFET
650 V has long been considered the practical lower limit of SiC devices with the relative cost outweighing the benefits for lower voltages. That is, until now. Voltage range below 650 V was where silicon (Si) and gallium nitride (GaN) have been the intuitive go-to for designers regarding device selection. For this reason, Infineon’s announcement of its 400 V SiC MOSFET has garnered industrial excitement and interest. The 400 V SiC MOSFET is based on 英飞凌 ’s second-generation (G2) CoolSiC technology. In this blog, Eugene Hsu and Stephen Russell from TechInsights delve deep into the technology behind this groundbreaking device IMBG40R015M2H and provide commentary on the device and insights into its potential applications like the future of power solutions for AI and beyond.
Infineon’s .XT package interconnect technology replaces conventional die attach with a diffusion-based process, resulting in an ultra-thin die attach layer to offer thermal resistance improvements. This can benefit SiC MOSFETs in two ways: since these allow a higher power density than their Si counterparts, this translates to the potential for higher thermal concentration during operations. Improving thermal management at the package level will be beneficial. In addition, Young’s modulus of 4H SiC, the industry-standard polytype used in SiC power devices, is about 3.1 times that of silicon. This means a SiC MOSFET can have an elevated risk of stress and strain-related delamination. The .XT technology claimed to address this compared to conventional die attach techniques to improve package reliability as well.
Compared to other SiC FETs analyzed at TechInsights, the R(DS(on))·A die figure is about half or less of most 600-750 V MOSFETs, and comparable to the UnitedSiC ( Qorvo Power ) UJ4C075018K4S 750 V JFET. Compared to SiC MOSFETs, SiC JFETs can inherently have a lower R(DS(on)) since the gate oxide interface and channel challenges in MOSFETs are bypassed and the channel resistance component is removed from the overall R(DS(on)).
Initial analysis indicates a trench gate pitch is about 7% reduced from the trench gate pitch observed in the 1200 V IMBG120R008M2H. Other sources of performance improvement, such as the MOSFET structures and substrate thickness, are yet to be?uncovered. TechInsights plans on performing additional analysis on the 400 V SiC MOSFET die, and the trench gate pitch measurement may further be improved in the process.
Compared to the 650 V CoolSiC G2 MOSFET IMBG65R015M2H the Q(GD), Q(OSS), E(OSS), and Q(G) values, and the related FOMs all favor the 400 V device. This indicates that to achieve the 14.5 mΩ R(DS(on)) for the 650 V IMBG65R015M2H device, the die size was scaled up, leading to higher gate charge and energy loss figures. At the same time, stepping the voltage rating down to 400 V allowed design room for device and die structure optimization to fine-tune these device parameters.
It may be worth noting that Infineon has also released a 400 V IGT40R070D1 CoolGaN device, also considered a specialized voltage rating for GaN technologies. However, Infineon stated that the 400 V SiC MOSFET is still the overall winner in designs requiring maximum efficiency. What this means in terms of applications is that in topologies where the higher voltage rating is not required, the 400 V SiC MOSFET can offer better power density, switch performance, and efficiency. Such applications can include server power supplies (PSUs), inverter motor control, power supplies, as well as solar and energy stage systems.
Sumitomo Metal Mining to establish a new 200-mm direct bonded SiC substrate mass production line
Sumitomo Metal Mining Co., Ltd. and its wholly owned subsidiary, Sicoxs Corporation, have decided to establish a new 200-mm (8-inch) mass production line of SiCkrest, the direct bonded SiC substrates, at Sicoxs’s Ohkuchi Plant.
As for SiCkrest, the sales of 150-mm (6-inch) substrates have already commenced, and also licensing of its bonding technology has also been carried out. For 200-mm substrates, however, the decision to invest in a development line was made in July 2022, and its sample shipments for customer certification have just started in September 2024. As a result of the construction of the mass production line for 200-mm substrates, the monthly production capacity of bonded SiC substrates will exceed 10,000 substrates (150-mm equivalent) in the second half of the fiscal year 2025, and Sicoxs also plans to start supplying polycrystalline SiC support substrates to its licensees.
SiCkrest uses a unique bonding technology to create two wafer layers, thus achieving both high performance and a competitive price. By bonding a thin layer of high-quality monocrystalline SiC on a low-resistance polycrystalline SiC support substrate, these products can realize low resistance and reduction of current-carrying deterioration throughout the entire substrate while maintaining the characteristics of a monocrystalline SiC.
This could be an interesting alternative to the SmartSiC technology from SOITEC .
An ultrafast and low-invasive short-circuit current limiting method for SiC MOSFETs with Kelvin-source
In SiC MOSFETs short-circuit fault, large short-circuit current spikes during the delay time of short-circuit protection will increase its risk of damage and accelerate device degradation. In this article, researchers from the State Key Laboratory of Power System at 清华大学 proposed an ultrafast and low-invasive short-circuit current limiting method by gate voltage control for SiC MOSFETs with Kelvin-source.
By introducing negative feedback composed of a low-invasive analog circuit into the gate driver, the proposed current limiting method can effectively limit SiC MOSFET short-circuit current. It offers advantages including ultrafast response, almost no additional power losses, excellent universality, and easy device selection. The basic physical principles of the current limiting method are explained, and the detailed circuit design is given. Furthermore, considerations in circuit design are discussed, including the analysis of the laws governing the negative feedback system to aid in device selection.
A prototype of a gate driver for SiC MOSFETs with desaturation protection and the proposed short-circuit current limiting circuit is constructed. Double-pulse tests and short-circuit tests are conducted using two types of SiC MOSFETs with varying voltage and current ratings. The results indicate that the proposed current limiting method can reduce the peak current by 52.2% and the short-circuit energy by 57.1% with almost no additional conduction loss and less than a?1% increase in switching loss. Additionally, during the short-circuit tests, the proposed current limiting method shows insensitivity to varying drain-source voltage and current rising rates, highlighting its exceptional universality.
Yifan Wu, Chi Li , Jianwei Liu, and Zedong Zheng, "An Ultrafast and Low-Invasive Short-Circuit Current Limiting Method by Gate Voltage Control for SiC MOSFETs With Kelvin-Source," in IEEE Transactions on Power Electronics, vol. 39, no. 12, pp. 15696-15708, Dec. 2024, doi: 10.1109/TPEL.2024.3441329.
Keysight unveils 3kV high-voltage wafer test system for power semiconductors
Keysight Technologies introduces a 4881HV High Voltage Wafer Test System, expanding its semiconductor test portfolio. The solution improves the productivity of power semiconductor manufacturers by enabling parametric tests up to 3kV supporting high and low-voltage in a one-pass test.
Manufacturers have traditionally measured wafers using separate testers for high and low voltages. However, demand for power semiconductors is rapidly growing due to their multifunctionality, higher performance, and next-generation devices such as silicon carbide (SiC) and gallium nitride (GaN). As a result, customers need a solution to more accurately and efficiently test their devices and reduce time to market.
Keysight’s solution addresses these challenges by allowing power device makers to perform process control monitoring (PCM) and wafer acceptance testing (WAT) in manufacturing. It enables highly flexible measurements from low current down to sub-pA resolution up to 3 kV at any pins.
“Keysight is thrilled to introduce our new wafer test system for power semiconductors, building on our long tenure of testing advanced semiconductors,” said Shinji Terasawa , Vice President and General Manager of Keysight's Wafer Test Solutions.
Great Wall Motors and Rohm collaborate on SiC power modules
Wuxi XinDong Semiconductor Technology Co., Ltd., a member of the Great Wall Motor Group, and ROHM Co., Ltd. have concluded a strategic partnership agreement regarding automotive power modules centered on SiC.
Through this agreement, XinDong Semiconductor will work to innovate and improve the performance of automotive power modules equipped with ROHM's SiC chips, to increase the cruising range of xEVs. In the future, both companies will continue to accelerate the development of innovative automotive power solutions centered on SiC and contribute to technological innovation in the automotive industry.
“This strategic partnership with ROHM will strengthen the Great Wall Motor Group's vertical integration system and accelerate the development of higher performance xEVs,” said Zheng Chunlai, Chairman of XinDong Semiconductor.
Webinar: More compact and efficient motor drives with SiC
After revolutionizing power electronics in multiple applications, SiC is now finding its way into motor drives. In a free webinar, Semikron Danfoss shows how its SiC power modules can enable unparalleled power density, efficiency, and cost savings.
Toshiba adds 1200V devices to its third generation SiC Schottky barrier diodes
Toshiba Electronic Devices & Storage Corporation has added the “TRSxxx120Hx Series” of 1200V products to its lineup of third generation SiC Schottky barrier diodes (SBD) for industrial equipment, such as photovoltaic inverters, EV charging stations and switching power supplies. Toshiba started shipments of the ten new products in the series, five in a TO-247-2L package and five in a TO-247 package.
The new TRSxxx120Hx Series are 1200V products that use the improved junction-barrier Schottky (JBS) structure of the company’s third-generation 650V SiC SBD. The use of a new metal in the junction barrier allows the new products to achieve a forward voltage of 1.27V (typ.), low total capacitive charge, and low reverse current. This significantly reduces equipment power loss in more higher-power applications.
Gallium Nitride News
CSIS brief: Addressing gallium supply chain risks
Four minerals central to semiconductor production—gallium, germanium, palladium, and silicon—face heightened supply chain risks due to dependence on China and Russia, a new brief from Gracelin Baskaran, PhD and Meredith Schwartz of the CSIS Critical Minerals Security Program at the Center for Strategic and International Studies (CSIS) concludes. Building resilient supply chains for these minerals is essential for the next generation of chipmaking. To date, enacted legislation has focused on downstream manufacturing, leaving American technologies highly vulnerable to minerals supply chain disruptions. For the authors, a new policy playbook for semiconductor minerals is necessary to incentivize private sector investment and foster cooperation with allies and strategic partners.
Gallium exceptionally critical
Gallium is key to unlocking higher-power and higher-frequency electronics. Yet, the mineral is also the semiconductor mineral with the highest supply chain vulnerability due to the concentration of its global production in China and the high dependence of U.S. semiconductor manufacturing on Chinese imports. Today, China produces 98% of the world’s gallium, meaning that even as the United States reshores semiconductor fabrication facilities with CHIPS Act money, the semiconductor industry remains reliant on materials sourced from China.
The difficulty in diversifying gallium sources centers on the mineral’s availability. It is exceedingly rare in the Earth’s crust—less than 19 ppm—and is sourced only as a byproduct of bauxite mining. The U.S. has small bauxite reserves (just 20 million metric tons) and minimal mining activity. Guinea, however, has the world’s largest bauxite reserves, at 7.4 billion metric tons, followed by Australia (5.1 billion) and Brazil (2.7 billion). In 2022, 64.3% of global bauxite exports came from Guinea, 12.0% from Australia, 9.3% from Indonesia, and 2.4% from Brazil. Most of these exports went to China for refining. For example, 81.5% of Guinea’s bauxite exports went to China, as did 97% of Australia’s and 100% of Indonesia’s.
If the U.S. seeks to increase its bauxite imports from non-Chinese sources, the private sector will need to invest in mineral-refining infrastructure in bauxite-rich allied nations and secure offtake agreements with Western mining companies. As an established ally, Australia would be an excellent partner for the United States to develop a bauxite-to-gallium refining pipeline. Guinea and Brazil are also potential partners for sourcing bauxite and investing in the development of refineries can boost economic development in these states while decreasing dependence on China and minimizing the related supply chain vulnerabilities.
领英推荐
Atomera collaborates with Sandia Labs to address GaN manufacturing challenges
Atomera announced a user project at the Center for Integrated Nanotechnologies (CINT) at Sandia National Laboratories to address the challenges of growing GaN films on silicon. This project aims to create the world’s first GaN transistors and test data from wafers employing Atomera’s Mears Silicon Technology (MST). The effort will build upon improvements already observed at the materials level in GaN/MST on silicon wafers.
Due to the limited availability and size of native substrates, most GaN devices have been grown hetero-epitaxially on sapphire, silicon carbide, or Si substrates. Although impressive performance has been achieved with each of these, only Si substrates offer a clear pathway to large wafer size, low cost, and compatibility with well-established CMOS wafer fabrication lines. However, there are significant challenges, including wafer warping or cracking, associated with the growth of thick GaN films on Si (GaN/Si), particularly at large wafer sizes.
Managing stress is the most important aspect of growing thick GaN epi on Si. Commercially available GaN on Si power electronics (PE) devices are currently limited to a ~650V rating due to the maximum epi thickness (and thus breakdown voltage) that can be grown on Si without excessive wafer curvature, micro-cracking or poor yield. MST can improve the growth of GaN epitaxy on Si substrates by relieving biaxial tensile stress.
“Manufacturing limitations have hindered the widespread adoption of GaN for modern power electronics. This user project with Sandia Labs will allow Atomera to fabricate devices and collect data to validate the mechanical and electrical benefits of MST-enhanced GaN on Si,” said Shawn Thomas , VP of Marketing & Business Development at Atomera.
Thermionic field emission in the lifetime estimation of p-GaN gate HEMTs
The current transport mechanism at the metal gate/p-GaN interface in p-GaN HETMs has been investigated by a team at CNR-IMM (Istituto per la microelettronica e microsistemi) and 意法半导体 . Space Charge Limited Current (SCLC) well describes the behavior of current density (J(G)) at lower applied bias (V(G)<6 V), while thermionic field emission (TFE) represents the dominant current mechanism at higher V(G).
Then, p-GaN gate reliability was investigated by time-to-failure (TTF) analysis carried out at constant positive V(G). In particular, the devices’ lifetime as a?function of the applied V(G) was described considering the J(G) -V(G) dependence according?to the TFE model. In this way, a maximum V(G) for a?10-year lifetime of 8.5 V has been estimated, significantly higher than that extracted by conventional E-model (7 V).
Giuseppe Greco , Patrick Fiorenza , Filippo Giannazzo , Marilena Vivona , carlo venuto , Ferdinando Iucolano , Fabrizio Roccaforte , "Thermionic Field Emission in the Lifetime Estimation of p-GaN Gate HEMTs," in IEEE Electron Device Letters, vol. 45, no. 10, pp. 1724-1727, Oct. 2024, doi: 10.1109/LED.2024.3438807
Overcoming challenges in the epitaxial growth and manufacturing of GaN films
Because of mismatched characteristics between substrates and epitaxial layers—such as lattice constant and thermal expansion coefficient mismatches—the ability to grow high quality and scalable GaN epitaxial layers on non-native substrates, such as silicon (Si) and sapphire, suffer great difficulties and prevent unlocking the full potential of GaN.
Using SEMI-spec and CMOS fab-friendly engineered substrates from Qromis, Inc. , which very closely match the CTE of GaN over a wide temperature range, Vanguard International Semiconductor Corporation (VIS) solves these problems and allows the deposition of crack-free, high-quality quality, and easily scalable high-performance GaN epitaxial layers on 200-mm platform.
In an interview with Power Electronics News, Shyh-Chiang Shen , Director of GaN Program Development Division at VIS, discussed the techniques and innovations VIS used to overcome obstacles, emphasizing their investment in GaN technology and its broader implications for the semiconductor sector.
Call for Digests for the International GaN4AP Workshop 2025
The "International GaN4AP - GaN for Advanced Power Applications Workshop: GaN for Advanced Power Applications" will be held in Catania, Sicily (Italy), on February 20-21, 2025, in the Benedictine Monastery of San Nicolò. This scientific forum will bring together leading specialists working in different areas of GaN technology, from universities, research centers, and industries. The workshop will be chaired by Giacomo Scelba and Gianluca Giustolisi from Università di Catania .
You are invited to submit original research papers within the International GaN4AP Workshop scope. If an abstract has been accepted and selected for the presentation, authors are expected to present the proposed work in a workshop session.
QPT and RAM Innovations to develop high-frequency automotive GaN inverter
QPT won a grant for a new project called VERDE to develop a high-frequency, 400 V/60 kW GaN inverter demonstrator for automotive use that will help demonstrate that GaN is now superior to SiC or silicon. This is funded by the Advanced Propulsion Centre UK (APC) and is designed to help accelerate early-stage technologies to market that will support the shift to net-zero automotive. The other company in the APC Project is RAM Innovations .
This demonstrator features high-frequency switching up to 1 MHz to enable dramatic savings in waste, weight, and power costs in the drive system. Key to this is QPT’s unique pure sign wave output that reduces harshness, noise, and vibration to improve reliability and reduce power consumption.
“We are already talking with automotive companies who would like to partner with us to leapfrog the market that is currently focused on SiC and realize GaN-based inverters. This is a major game changer for the EV industry,” explained Rupert Baines , QPT’s CEO,
Miscellaneous News
Pseudo-source gated β-Ga?O? MOSFET
This study from a team of researchers at KAUST (King Abdullah University of Science and Technology) demonstrates pseudo-source-gated β-Ga?O? MOSFETs. The proposed pseudo-source gated transistor (pseudo-SGT) architecture has a thin (～11?nm) recessed channel design, effectively emulating conventional SGT characteristics without significantly compromising on-state current.
The fabricated devices exhibit a remarkable intrinsic gain of 10?, low output conductance of 10?? S/mm, transconductance of 10?3 S/mm, and drain saturation voltage of ～1.5?V while maintaining a drain current of 1.3?mA/mm. These enhanced performance metrics significantly expand the potential of β-Ga?O? MOSFETs for the development of Ga?O? monolithic power integrated circuits.
Ganesh Mainali , Dhanu Chettri , Vishal Khandelwal , MRITUNJAY KUMAR , Glen Isaac Maciel García , Zhiyuan Liu , Na X. , José Manuel Taboada Vásquez , Xiao Tang, Xiaohang Li ; Pseudo-source gated beta-gallium oxide MOSFET. Appl. Phys. Lett. 30 September 2024; 125 (14): 142104. https://doi.org/10.1063/5.0231763
Latest updates on 150-mm (6-inch) production lines for SiC and Ga?O?
As TrendForce Corporation reports, several 150-mm (6-inch) production lines have recently made significant advancements, focusing on SiC and Ga?O?.
On September 21, 2024, NEXIC announced that it had completed the first wafer batch in its fab. NEXIC focuses on technological innovation and product development in SiC power devices and power modules. Construction of the factory in Jiangyin, Jiangsu Province, China, began in August 2023, with equipment installation scheduled for August 2024. Reports indicate that NEXIC’s 150-mm power semiconductor manufacturing project has a total investment of RMB 2 billion (USD 283.5 million). Once fully operational, the fab is expected to have an annual production capacity of 1 million wafers.
In June 2024, industry news revealed that NEXIC’s power module R&D and production base project had signed an agreement to settle in Xidong New City, Wuxi, China. This project with a total investment of over RMB 1 billion (USD 141.8 million), focuses on building an automotive-grade power module packaging line, covering applications such as main drive systems, ultra-fast charging piles, photovoltaics, and industrial uses. The project is expected to begin production in 2025, with an annual output of approximately 1.29 million units and an estimated annual output value exceeding RMB 1.5 billion (USD 212.6 million).
China’s first 150-mm Ga?O? substrate and epi-wafer line breaks ground
On September 10, 2024, Fujia Gallium commenced construction of a 150-mm Ga?O? substrate and epitaxial wafer line in Fuyang, Hangzhou. Founded in 2019, Fujia Gallium is committed to the commercialization of this UWBG semiconductor material, focusing on the growth of Ga?O? monocrystals and the development, production, and sale of substrates and epitaxial wafers. Its products are mainly used in power devices, microwave RF, and optoelectronic detection.
It is reported that Fujia Gallium is currently the only company in China capable of both 150-mm monocrystal growth and epitaxy. This project marks the construction of China’s first 150-mm Ga?O? monocrystalline and epitaxial wafer growth line.
Job exchange
Nexperia: Many job opportunities in SiC
Nexperia offers many opportunities for professionals interested and specialized in SiC technology mainly in Hamburg (Germany). Together with a skilled team, you will shape the field and future of SiC within the company.
Infineon: Senior Staff Engineer Product Definition Engineer – Low Voltage Automotive GaN
Infineon Technologies Canada Inc. is seeking a highly motivated, energetic, and creative Systems Engineer with broad knowledge and experience to perform product definition and development on Gallium Nitride (GaN) Power Switches and Integrated Power Stage (IPS) for ≤100V low voltage (LV) automotive application. Candidates should be able to work individually and with a diverse team under pressure to create competitive and innovative LV automotive GaN products.
Fraunhofer ISIT: Different opportunities in GaN
Fraunhofer Institute for Silicon Technology ISIT is looking for talents to join their Advanced Devices group:
Graduate / PhD candidate / post-doc level:
Student assistants:
IT Director - COMEX member - P&L Leader of Data and Cloud Platform
1 个月ZX Spectrum Next - The future of Sinclair ZX Spectrum - Do not hesitate to comment it ?? - https://www.dhirubhai.net/posts/olivierlehe_spectrum-activity-7253646122257117184-ls5W?utm_source=share&utm_medium=member_ios
Congrats Ralf.
Associate Professor, Advanced Semiconductor Lab at KAUST | (Ultra)wide Bandgap Semiconductor and 3D Stacking
1 个月Thanks for highlighting our latest transistor work
Congratulations on the milestone Ralf. Its a significant milestone for us as well featuring in your newsletter!
Freelance Technology Writer and Analyst
1 个月Ralf - Congratulations on the milestone! Well deserved.