Ralf’s GaN & SiC News (January 16, 2024)
Welcome to the latest edition of my newsletter on silicon carbide, gallium nitride, and other wide-bandgap semiconductor materials. If you want to get covered, please reach out to me via [email protected]
Content
Gallium Nitride News
Innoscience products may not be imported or sold in the United States
EPC - Efficient Power Conversion announced the conclusion of the Presidential review period for the U.S. International Trade Commission ’s (ITC) final determination, affirming that Innoscience infringed EPC’s foundational patent for GaN technology. The ITC’s decision is now final, implementing an import and sales ban on Innoscience products in the United States without a license from EPC.
“This ruling marks a milestone for EPC and fair competition in GaN technology. We will safeguard our IP to drive innovation and support our customers in shaping the future of power electronics.” said Alex Lidow, CEO and co-founder of EPC.
I asked EPC for more details. Below are my questions and the unfiltered responses.
Yes.
In enforcing its patents against Innoscience in the ITC, EPC pursued and secured a ban directed towards Innoscience itself. This does not mean that EPC is indifferent to incorporating the Innoscience infringing components into products of third parties without EPC's permission. Anyone who uses, sells, or imports products containing Innoscience's infringing chips in the United States without a license is also infringing EPC's intellectual property
Toyoda Gosei presents a 200 mm single crystal GaN wafer
Toyoda Gosei has shown a technology to enhance GaN substrates and to improve device performance compared to commercially available substrates in both power regulation capacity and yield ratio. The result has come out of a Japanese Ministry of the Environment project looking at the wider application of GaN power devices, for which Toyoda Gosei is providing technology to obtain ideal GaN crystals using the Na?flux method (a liquid phase epitaxy technique where sodium acts as the solvent to facilitate crystal formation).
Currently, 4-inch (100-mm) diameter GaN substrates fabricated by HVPE are commercially available, and it has been reported that 6-inch (150-mm) GaN crystals can be obtained using HVPE, while 7-inch (175-mm) GaN substrates can be obtained by tiling 2-inch GaN substrates. For thick film growth, thickness greater than 5 mm has also been reported using the HVPE method.
The simultaneous growth of large quantities of GaN crystals achieved using the ammonothermal method can also reduce fabrication costs. Among these methods, the Na-flux method has attracted attention as a means of obtaining large-diameter, low-dislocation, and low-curvature GaN crystals.
Most reports related to the Na-flux method have dealt with crystal quality; few have characterized GaN devices. This paper looks at both the structural quality of the latest GaN crystals grown using the method, and for the first time, the characteristics of a vertical transistor fabricated this way. The vertical transistor produced on the Na-flux-based HVPE-GaN substrate exhibited normally off operation with a gate-voltage threshold of over 2?V and a maximum drain current of 3.3?A during the on-state operation, indicating the first vertical GaN transistor operation on a GaN substrate produced through the Na-flux method.
A breakdown voltage of over 600?V was confirmed based on the off-state characteristics, and a low leakage current was realized. The team also found that the on-resistance variation could be reduced by suppressing the effective carrier density variation using a GaN substrate with small off-angle variations.
In addition, the reverse I–V characteristics of the parasitic PN junction diode structures exhibited suppression of the number of devices with a large leakage current compared to the commercially available GaN substrate. According to the researchers, these results indicate the importance of low bowing and threading dislocation density (TDD) in GaN crystals.
Finally, the researchers demonstrated a circular GaN substrate with 161 mm diameter, surpassing 6 inches, grown by the Na-flux method, which is the largest GaN substrate except for those made through the tiling technique.
Yusuke Mori, et al. 2024; ‘Characteristics of Vertical Transistors on a GaN Substrate Fabricated via Na-Flux Method and Enlargement of the Substrate Surpassing 6 Inches’, physica status solidi (RRL) – Rapid Research Letters, Volume 18, Issue 11. https://doi.org/10.1002/pssr.202400106
Chinese firms buy up BelGaN assets
Chinese companies did most of the buying at the bankruptcy auction of the Belgian GaN foundry BelGaN . The online auction, which began November 2024, raised an estimated €23 million. Reports now say a third of the assets were snapped up by Chinese firms. Officials are said to be exploring which machinery can be exported without a license to China, and which will require dispensation.
BelGaN bought the fab from 安森美半导体 in 2022 and launched a strategy to switch to GaN chips after a significant revenue fall. However, this migration failed to deliver, and after several offers, BelGaN's creditors were unable to find a buyer. Therefore, the Oudenaarde-based GaN specialist went out of business late in 2024.
Cambridge GaN Devices develops hybrid switch solution for higher light-load efficiency
At the IEDM Conference in December 2024, Cambridge GaN Devices Ltd ’ CTO Professor Florin Udrea presented the ICeGaN Combo concept — a parallel integration of an intelligent GaN HEMT (ICeGaN) and an IGBT. This solution is designed to tackle a key challenge faced by many applications, such as EV traction inverters: poor light-load efficiency.
With excellent light-load efficiency and robust high-power performance, this ICeGaN Combo switch is a perfect fit for electric vehicle (EV) inverters, where light-load operation dominates > 85% of its uses. The ICeGaN excels in light-load, low-temperature operation with smart integrated features, while the IGBT shines in high-power, high-temperature conditions, including offering avalanche capability.
Providing a superior balance of efficiency, cost, and robustness, the ICeGaN Combo is a viable alternative to SiC or hybrid SiC and IGBT solutions in the growing market for high-efficiency EV inverters.
Switching loss reduction with commutation loop layout optimization for GaN devices with low output capacitance
Layout parasitics have a significant influence on the switching performance of WBG semiconductors. Thus, a closer investigation of the layout is worthwhile. Typically, layout procedures only focus on reducing the parasitic inductance.
In contrast, the current paper from a team of researchers from Reutlingen University proposes two commutation loop layouts for GaN devices, that additionally considers parasitic layout capacitances. For GaN devices, the device capacitance can be of the same order of magnitude as the parasitic layout capacitance. The proposed layouts result in lower switching losses compared to standard layouts by up to 20%. Degrees of freedom for the designer are illustrated based on a parametric study. The parasitic layout components are extracted using finite element method (FEM) simulations, and the switching losses are estimated using circuit-level simulation.
Jannik Maier, Burkhard Ulrich, Philipp Czerwenka , Eckhard Hennig , and Gernot Schullerus, "Switching Loss Reduction with Commutation Loop Layout Optimization for GaN Devices with Low Output Capacitance," 2024 IEEE Design Methodologies Conference (DMC), Grenoble, France, 2024, pp. 1-7, doi: 10.1109/DMC62632.2024.10812171.
Analytical power loss model for GaN transistors based on temperature and parasitic parameters
The emergence of WBG power devices based on GaN material has propelled the development of power electronic converters towards high frequency, high power density, and miniaturization. However, as the switching speed increases, so does the proportion of switching losses. Accurate analysis of switching loss is crucial for evaluating and optimizing converter performance, as well as enhancing system reliability.
This paper from researchers at the Nanjing University of Aeronautics and Astronautics establishes a comprehensive GaN device switching loss model that considers parasitic parameters and temperature effects. The impact of key parasitic parameters on GaN devices is analyzed, and the switching losses using an analytical model that considers the relationship between device parasitic capacitance, PCB parasitic parameters, temperature variations, and losses is estimated.
The effectiveness of the proposed model is verified on a double-pulse experimental platform based on GS66516T. Extensive experimental results show that under different working conditions and temperatures, the error between the proposed loss model predictions and actual losses remains within 10%, thus enabling accurate prediction.
Haihong Qin, Zheng Xiaoxue, Ziyue Zhu, and Chunying Gong, "Analytical Power Loss Model for GaN Transistors Based on Temperature and Parasitic Parameters," 2024 7th International Conference on Electrical Engineering and Green Energy (CEEGE), Los Angeles, CA, USA, 2024, pp. 119-124, doi: 10.1109/CEEGE62093.2024.10744178.
Silicon Carbide News
Analyzing Wolfspeed's problems in two diagrams
Wolfspeed stock is at recent record lows, with the market cap today somewhere under $650 million, well below the $850 million offered price for the SiC business that 英飞凌 was blocked from acquiring in February 2017.
Kevin Matocha looks at some of the challenges faced by Wolfspeed, and the key areas the new CEO Tom Werner is likely focusing on:
Kevin Matocha explains two key charts that give insights into the challenges:
That is a great analysis by Kevin Matocha .
China’s 200-mm SiC production lines enter fierce competition
Recently, two 200-mm (8-inch) SiC production lines, one from 杭州士兰微电子股份有限公司 and the other from 意法半导体 , have made notable progress, TrendForce Corporation reports. The year 2025 is being hailed as the “Year One of 200-mm Silicon Carbide,” marking a pivotal period for global pilot production and ramp-up of 200-mm SiC chip manufacturing. Currently, China has four publicly disclosed 8-inch SiC production lines: Silan Microelectronics, UNT, Hunan Sanan, and FMIC. As 2025 approaches, China’s SiC industry is poised for a new wave of growth and competition in the global market.
领英推荐
Silan Microelectronics
According to recent reports, Silan Microelectronics’ 200-mm SiC power device chip production line is advancing steadily. The first phase of the project is currently under structural construction and is expected to top out in the first quarter of 2025, with initial operations by the end of the fourth quarter. Trial production is slated for the first quarter of 2026.
The project represents a total investment of RMB 12 billion ($1.6 billion) and covers a construction area of 234,500 square meters, divided into two phases. The first phase involves an investment of RMB 7 billion and aims for an annual production capacity of 420,000 200-mm SiC power device chips. Once both phases are completed and fully operational, the annual production capacity will increase to 720,000 chips.
STMicroelectronics
Meanwhile, STMicroelectronics’ 200-mm SiC epitaxy and chip production line, located in the Western (Chongqing) Science City Microelectronics Park, is in the final stages of equipment installation and testing. The production line is expected to be operational and start producing wafers by late February 2025, with large-scale mass production anticipated by the end of the third quarter.
This facility, jointly established by 三安光电股份有限公司 and STMicroelectronics, will produce 200-mm SiC substrates and wafers for applications in electric vehicles, power grids, and railway transportation. With a total investment of USD 3.2 billion (approximately RMB 23.36 billion), the project plans an annual output of 480,000 automotive-grade MOSFET SiC power chips by 2028, when full capacity is reached.
Foxconn’s Hon Hai Research Institute uses AI to optimize SiC MOSFET guard rings
For high-power SiC devices, breakdown voltage analysis is an important parameter, especially for guard ring design. This work of researchers at 富士康 ’s Hon Hai Research Institute explores the implementation of machine learning (ML) on SiC guard ring parameters such as ion implanted dose and energy. The reinforcement learning method has been successfully implemented on the 1.7-kV SiC guard ring device TCAD simulated data for the prediction of parameters. This work has predicted the parameters successfully for the 2.5-kV guard ring design.
For training, proximal policy optimization (PPO) and advantage actor-critic (A2C) RL agents were deployed. The network architecture was kept at “auto” with three hidden layers of 128 neurons in each layer. The method is practically feasible and easily implemented as compared to other works and has been shown in this paper. By using the limited design parameters of the 1.7-kV guard ring device, the trained agent has successfully predicted the design parameters for the 2.5-kV guard ring device, which has been confirmed using TCAD simulations.
This work is more accurate, practical, and result-oriented, and the authors believe that this can significantly minimize the computational cost as compared to the standalone TCAD simulations. Also, this implementation of ML on TCAD data can substantially accelerate the design exploration for the power devices and ultimately lower product-to-market time.
Tejender Singh Rawat , Chia-Lung Hung, Yi-Kai Hsiao, Wei-Yu Chen , Surya Elangovan , Wei-Ting Lin, Yi-Rong Lin, Kai-Lin Yang, Jan Nien-Yi , Yung-Hui Li , hao-chung kuo , "A Reinforcement-Learning Based Approach for Designing High-Voltage SiC MOSFET Guard Rings," in IEEE Open Journal of Power Electronics, vol. 5, pp. 1853-1861, 2024, doi: 10.1109/OJPEL.2024.3496865.
X-FAB launches next-generation SiC process platform
X-FAB has launched XSICM03, its next-generation XbloX platform, advancing SiC process technology for power MOSFETs. The XSICM03 platform with robust design rules allows customers to create SiC planar MOSFETs with a cell pitch that is over 25% smaller than the previous generation. This improvement allows for up to a 30% increase in die per wafer compared to the previous generation.
XbloX integrates qualified SiC process development blocks and modules for planar MOSFET production, simplifying the onboarding process and significantly reducing design risks and product development time. This approach can give customers a competitive edge, allowing designers to create a diverse product portfolio while achieving production timelines up to nine months faster than traditional development methods.
Mutual impacts of different dead-times and control sample times on SiC inverter loss in motor drive
At high PWM carrier frequencies up to 200 kHz using SiC devices, the individual and mutual impacts of the sample time and dead time on the SiC inverter loss in a motor drive system may become significant. Thus, these issues at load conditions are experimentally investigated and analyzed in this study from Shimane University , Hanoi University of Science and Technology , Toyota Technological Institute at Chicago (TTIC) , and Nazarbayev University , where the dead-time is from 250 to 1000 ns and the control sample time is from 100 to 1000 μs.
Furthermore, the measured results with the SiC-MOSFET inverter are briefly compared to a silicon IGBT inverter for reference. Moreover, the total harmonics distortion (THD) of the measured voltage and current of the considered interior permanent magnet synchronous motor (IPMSM) is provided to explain the results. Finally, insights into theoretical analysis are shown as complementary explanations of the experimental findings. The outcome of this research can be treated as a reference in choosing the suitable value of the control sample time for IPMSM drive systems using SiC-MOSFET inverters.
Dr. Gia Minh Thao NGUYEN , Van-Long Pham , Asuka Kutsukake, Keisuke Fujisaki, Ton Duc Do, "Mutual Impacts of Different Dead-times and Control Sample Times on SiC Inverter Loss in Experimental Motor Drive at High Carrier Frequencies," 2024 Tenth International Conference on Communications and Electronics (ICCE), Danang, Vietnam, 2024, pp. 631-636, doi: 10.1109/ICCE62051.2024.10634598.
Indichip Semiconductors and Japan's Yitoa to build SiC fab in southern India
Indichip Semiconductors Ltd, in collaboration with Japan's YITOA Aurora Micro Technology Co., Ltd. , is set to make a significant leap in India's electronics sector by establishing the nation's first private semiconductor plant in Andhra Pradesh. The ambitious project pegged at an investment of INR140 billion ($1.62 billion), will focus on the production of SiC chips, a crucial component in the advancement of energy-efficient technologies.
Sources such as the Business Standard and The Times Of India report that the joint venture has reached an agreement with the Andhra Pradesh government, paving the way for the development of the pioneering semiconductor manufacturing site. The facility, initially designed to produce 10,000 wafers per month, is expected to ramp up its production capacity to 50,000 wafers monthly within the next two to three years.
The announcement took place during a key meeting involving prominent state officials, including IT Minister Lokesh Nara and Industries Minister TG Bharat. The Government of Andhra Pradesh has committed to providing land and crucial infrastructure at the Orvakal mega industrial hub in Kurnool, as part of their strategic Semiconductor Policy launched in November 2024. This policy underscores Andhra Pradesh's ambition to become a frontrunner in electronics and semiconductor manufacturing, highlighting the state's dedication to fostering technological growth.
Miscellaneous News
China’s third-generation semiconductor companies rush overseas
Following the acceptance of the IPO application by Tianyu Semiconductor on the main board of The Stock Exchange of Hong Kong Limited (HKEX) on December 23, 2024, two other Chinese third-generation semiconductor companies, Innoscience and SICC CO. Ltd , have also made moves towards listing on the Hong Kong market. Among them, Innoscience has already successfully gone public on the HKEX.
Innoscience’s HKEX Listing
On December 30, 2024, GaN power semiconductor manufacturer Innoscience officially listed on the main board of the HKEX. Innoscience issued 45.364 million H-shares globally at an offering price of HKD 30.86 per share, raising approximately HKD 1.4 billion, with net proceeds of HKD 1.302 billion. According to its plans, the funds will primarily be used to expand 8-inch GaN wafer production capacity, enhance R&D and product portfolio, and grow its global GaN product distribution network.
Innoscience’s announcement of final offering prices and allotment results revealed the participation of four cornerstone investors, including STMicroelectronics, Jiangsu SOE Mixed Ownership Reform Fund, Dongfang Innovation Capital, and Suzhou High-End Equipment Fund, who collectively subscribed for USD 100 million worth of shares.
Innoscience has established China’s first complete 8-inch silicon-based GaN wafer and power device mass production line in Zhuhai. Additionally, its Suzhou factory, operational since October 2021, is the world’s largest 200-mm GaN-on-Si wafer manufacturing facility.
The company disclosed that in 2023, Innoscience ranked first globally among GaN power semiconductor companies in market share, accounting for 42.4% based on GaN discrete device shipment volumes. As of Q3 2024, Innoscience’s cumulative GaN shipments surpassed 1 billion units.
SICC Targets Dual Listing (A+H Shares)
On December 27, 2024, SiC substrate manufacturer SICC announced its intention to issue shares overseas (H-shares) and list on the HKEX to accelerate its internationalization strategy and overseas business layout. SICC aims to enhance its offshore financing capabilities, increase its capital strength, and improve overall competitiveness. The company currently operates production facilities in Jinan and Jining, Shandong, with its Shanghai Lingang Smart Factory serving as the main production base for conductive SiC substrates.
SICC has achieved mass production of 200-mm conductive substrates, 150-mm conductive substrates, 150-mm semi-insulating substrates, and 100-mm semi-insulating substrates. Its conductive SiC substrate products have already been adopted by international industry leaders such as Infineon and Bosch in power electronics and automotive electronics applications.
Accelerating the Overseas Expansion of Third-Generation Semiconductor Companies
In recent years, driven by demand from consumer electronics and the rise of industries such as new energy vehicles (NEVs), data centers, photovoltaics, wind power, and industrial control, third-generation semiconductor companies focusing on materials like SiC and GaN have developed rapidly.
According to global market research firm TrendForce Corporation , the global GaN power device market reached $271 million in 2023 and is expected to grow to $4.376 billion by 2030, with a CAGR of 49%. Meanwhile, SiC continues to see accelerated adoption in applications requiring high power density and efficiency, such as automotive and renewable energy. The global SiC power device market is projected to reach $9.17 billion by 2028.
With substantial market opportunities and supportive national policies, Chinese semiconductor companies are entering a phase of rapid growth and have begun making a mark on the international stage.
The recent HKEX applications by SICC, Innoscience, and Tianyu Semiconductor signal their intent to accelerate global expansion, boost technology R&D and production capacity, and further internationalize while broadening financing channels and enhancing market competitiveness.
ECCE 2025: Call for Papers
The Seventeenth Annual IEEE Power Electronics Society Energy Conversion Congress and Exposition (ECCE) will be held in Philadelphia, PA, USA, from October 19 to 23, 2025. ECCE is a pivotal international event on energy conversion. ECCE 2025 will feature both industry-driven and application-oriented technical sessions as well as an exposition. The conference will bring together practicing engineers, researchers, and other professionals for interactive and multidisciplinary discussions on the latest advances in areas related to energy conversion.
Research on reliability issues of gallium oxide power devices
This article from Shibo Ren of the Chengdu University (CDU) of Electronic Science and Technology focuses on the reliability of gallium oxide (Ga?O?) and its power devices. It mainly revolves around the solutions to the problems encountered in the process flow such as the design and preparation of Ga?O? power devices.
It introduces a variety of methods in detail to achieve the design of a new device structure and optimize the existing process, so as to meet the high requirements of material, equipment, and operation in the device preparation process. The various methods introduced are used to solve the four most common problems in the performance optimization of gallium oxide power devices: p-type doping problems; electrical performance issues; normal device shutdown issues; thermal management issues. Through learning these methods, we can improve the existing processes.
Shibo Ren, "Research on Reliability Issues of Gallium Oxide Power Devices," 2024 3rd International Symposium on Semiconductor and Electronic Technology (ISSET), Xi'an, China, 2024, pp. 112-117, doi: 10.1109/ISSET62871.2024.10779709.
MOCVD growth of β-Ga?O? with fast growth rates, low controllable doping, and superior transport properties
Si-doped β-phase (010) Ga?O? epi-films with fast growth rates were comprehensively investigated using trimethylgallium (TMGa) as the Ga precursor via metalorganic chemical vapor deposition (MOCVD). Two main challenges facing the MOCVD growth of thick (010) β-Ga?O? films with fast growth rates include high impurity carbon (C) incorporation and rough surface morphologies due to the formation of imbedded 3D pyramid-shaped structures.
In this work, researchers from 美国俄亥俄州立大学 used two different categories of oxygen sources (high-purity O2 > 99.9999% and O?* with 10?ppm of [H?O]) for β-Ga?O? MOCVD growth. Their study revealed that the size and density of the 3D defects in the β-Ga?O? epi-films were significantly reduced when O?* was used. In addition, the use of off-axis (010) Ga?O? substrates with a 2° off-cut angle leads to further reduction of defect formation in β-Ga?O? with fast growth rates. To suppress C incorporation in MOCVD β-Ga?O? grown with high TMGa flow rates, their findings indicate that high O? (or O?*) flow rates are essential. Superior room temperature electron mobilities as high as 110–190?cm2/V·s were achieved for β-Ga?O? grown using O?* (2000?sccm) with a growth rate of 4.5?μm/h (film thickness of 6.3?μm) within the doping range of 1.3 × 101? to 7 × 101? cm?3. The C incorporation is significantly suppressed from ～101??to <5 × 101? cm?3 ([C] detection limit) for β-Ga?O? grown using a high O? (O?*) flow rate of 2000?sccm.
Results from this work will provide guidance on developing high-quality, thick β-Ga?O? films required for high-power electronic devices with vertical configurations.
Dong Su Yu, Lingyu Meng , Hongping Zhao ; MOCVD growth of β-Ga?O? with fast growth rates (>4.3 μm/h), low controllable doping, and superior transport properties. Appl. Phys. Lett. 9 December 2024; 125 (24): 242106. https://doi.org/10.1063/5.0238094