Ralf’s GaN & SiC News (February 6, 2025)
Welcome to the latest edition of my newsletter on silicon carbide, gallium nitride, and other wide bandgap semiconductor materials. If you want to get covered, please reach out to me via [email protected]
Content
Gallium Nitride News
GaN adoption at tipping point, says Infineon
In its 2025 predictions, 英飞凌 says GaN is now on its way to reaching tipping points in its adoption in further industries, substantially driving the market for GaN-based power semiconductors.
Artificial intelligence: Powering AI will be highly dependent on GaN. The rapid increase of required computing power and energy demand in AI data centers will drive the need for advanced solutions capable of handling the substantial loads associated with AI servers. Power supplies that once managed 3.3 kW are now evolving towards 5.5 kW, with projections moving towards 12 kW or more per unit.
By using GaN, AI data centers can improve power density, which directly influences the amount of computational power that can be delivered within a given rack space. While GaN presents clear advantages, hybrid approaches combining GaN with Si and SiC are ideal for meeting the requirements of AI data centers and achieving the best trade-offs between efficiency, power density, and system cost.
Home appliances: In the home appliance market, Infineon expects GaN to gain significant traction, driven by the need for higher energy efficiency ratings in applications like washing machines, dryers, refrigerators, and water/heat pumps. In 800 W applications, for example, GaN can enable a two percent efficiency gain, which can help manufacturers achieve the coveted A ratings.
Automotive: According to Infineon, GaN-based on-board chargers and DC-DC converters in electric vehicles will contribute to a higher charging efficiency, power density, and material sustainability, with a shift towards 20 kW+ systems. Together with high-end SiC solutions, GaN will also enable more efficient traction inverters for both 400 V and 800 V EV systems, contributing to an increased driving range.
Robotics: In 2025 and beyond, robotics will see widespread adoption of GaN supported by the material's ability to enhance compactness, driving growth in delivery drones, care robots, and humanoid robots. As robotics technology integrates AI advancements like natural language processing and computer vision, GaN will provide the efficiency required for compact, high-performance designs. Integrating inverters within the motor chassis eliminates the inverter heatsink while reducing cabling to each joint/axis and simplifying EMC design.
Innoscience argues that Infineon uses “doctored evidence” in GaN patent dispute
As David Radulescu, Ph.D. reports, the USPTO (U.S. Patent & Trademark Office) denied last month Innoscience ’s invalidity challenge of the 1st US patent that 英飞凌 asserted against Innosciene last summer. Innoscience is now asking for reconsideration based on allegations that “Infineon misrepresented and doctored evidence”:
“The Board based its decision denying institution on whether Petitioner’s prior-art combinations rendered obvious the “lateral transistor” limitation in claim 1 of the ’481 patent. Whether a transistor is defined as “lateral” or “vertical” depends on the location of the electrodes. ... Indeed, when applying for its patent, [Infineon] disclaimed “vertical” transistors by partially defining them based on the electrode locations. ... But when addressing this prosecution history in these IPR proceedings, Infineon clipped its admissions about electrode placement and argued that only current flow can dictate whether a transistor is defined as “lateral” or “vertical.” ...? After this about-face, Infineon then doctored prior-art evidence.”
Design approach for lateral optimization of GaN CAVETs: A static characteristics study
This paper from researchers at the Centre for Industrial Electronics (CIE) of the 南丹麦大学 demonstrates a fabless design approach for the lateral optimization of a GaN current aperture vertical electron transistor (CAVET). To this end, the length of the current blocking layer (CBL) has been scaled to exhibit the influence of current aperture length on the static characteristics of GaN CAVET e.g. threshold voltage (V_th), on-state resistance (R_ON), and breakdown voltage (V_BR) and C-V characteristics.
Results conclude that the on-state resistance decreases with an increase in aperture length for a given length of the device. Devices with large aperture lengths are additionally susceptible to breakdown at low voltages. This observation illustrates a critical trade-off between the on-state resistance and breakdown voltage for different aperture lengths. Considering this trade-off, optimizing aperture length maximizes Baliga's Figure of Merit (BFOM) for power application.
Ashrafun Naher Pinky , Thomas Ebel , Samaneh Sharbati , Design approach for lateral optimization of GaN CAVETs: A static characteristics study, Power Electronic Devices and Components, Volume 10, 2025, 100075, ISSN 2772-3704, https://doi.org/10.1016/j.pedc.2024.100075.
Miscellaneous News
Normally-off diamond transistors for high-power applications
A landmark development led by researchers from the James Watt School of Engineering, University of Glasgow with partners from 澳大利亚皇家墨尔本理工大学 and 美国普林斯顿大学 could help create a new generation of diamond-based transistors for use in high-power electronics. Their new diamond transistor overcomes the limitations of previous developments in technology to create a device much closer to being of practical use across a range of industries which rely on high power systems.
The team have found a new way to use diamond as the basis of a transistor that remains switched off by default - a development crucial for ensuring safety in devices which carry a large amount of electrical current when switched on. At the 英国格拉斯哥大学 ’s James Watt Nanofabrication Centre , the team used surface chemistry techniques to improve the performance of diamond, coating it in hydrogen atoms followed by layers of aluminum oxide.
Their diamond transistor requires six volts to switch on, more than twice the voltage compared to previous diamond transistors, while still delivering high current when activated. They also improved how efficiently charge moves through the device, achieving twice the performance compared to traditional diamond transistors. In practical terms, this means electrical charge can move more freely through the device, improving its efficiency.
When switched off, the device's resistance is high enough that it measured below the noise floor of the team’s equipment in the lab meaning almost zero current leaks through when it's supposed to be off, a crucial safety feature for high-power applications.
“Previous state-of the-art diamond transistors have generally been good at one at the expense of the other – switches which were good at staying off but not so good at providing current on demand, or vice-versa. What we’ve been able to do is engineer a diamond transistor which is good at both, which is a significant development,” said Professor David Moran.
Chunlin Qu , Isha Maini , Qing Guo, Alastair Stacey, David A. J. Moran , Extreme Enhancement-Mode Operation Accumulation Channel Hydrogen-Terminated Diamond FETs with V(th) < ?6?V and High on-Current. Adv. Electron. Mater. 2024, 2400770. https://doi.org/10.1002/aelm.202400770
Fabrication of inversion channel diamond MOSFET with atomically step-free Al?O?/diamond interface
In 2016, this group of researchers from Kanazawa University , National Institute of Advanced Industrial Science and Technology (AIST) and Diamond And Carbon Applications GmbH reported the first inversion channel diamond MOSFET with normally-off operation and field-effect mobility (μ_FE) of 8 cm2/(V?s) and then have developed the diamond MOSFET-related technologies. However, the μ_FE of the inversion channel diamond MOSFET is 20 cm2/(V?s), which is still lower than the ideal channel mobility of 3,000 cm2/(V?s). One of the main reasons for the low mobility is the high interface state density (D_it) of 1013 cm?2eV?1 or more generated by the bunching step on the diamond surface.
In this study, in order to reduce D_it and improve μ_FE, the reseachers propose the fabrication process of an inversion channel p-type diamond MOSFET with atomically step-free Al?O?/diamond (111) interface and demonstrate the step-free interface diamond MOSFET. The step-free diamond MOSFET showed normally-off, gate voltage control, and clear saturation characteristics. The μ_FE and D_it of the step-free diamond MOSFET were 30.6 cm2/(V?s) and 2.8 × 1012 cm?2eV?1, respectively. The D_it values are the lowest among the inversion channel diamond MOSFET reported to date for inversion channel MOSFET using an Al?O?/diamond interface.
Kazuki Kobayashi, Kai Sato, Hiromitsu Kato, Masahiko Ogura, Toshiharu Makino, Tsubasa Matsumoto, Kimiyoshi Ichikawa, Kan Hayashi, Takao Inokuma, Satoshi Yamasaki, Christoph E Nebel , Norio Tokuda, Fabrication of inversion channel diamond MOSFET with atomically step-free Al?O?/diamond interface, Carbon, 2025, 120024, ISSN 0008-6223, https://doi.org/10.1016/j.carbon.2025.120024.
Surface patterning of β-Ga?O? thin films by area selective crystallization via room-temperature excimer laser annealing and low-toxic wet etching processes
In the present study, researchers from Kanagawa Institute of Technology and Tokyo Institute of Technology have developed a fully room-temperature and low-toxic surface patterning method for β-Ga?O?, which consists of the area selective laser-induced crystallization of amorphous Ga?O? thin films and acid solution etching processes.
Highly (01)-oriented crystalline β-Ga?O? thin films with ～70 nm thickness on α-Al?O? (0001) substrates were obtained through a combination of room-temperature deposition process and the subsequent excimer laser annealing at a deep ultraviolet wavelength of 248 nm. In conclusion, the area selective crystallized β-Ga?O? micropatterns were obtained through ultrasonic wet etching with 40% H?PO? aqueous solution to remove amorphous regions.
Daishi Shiojiri, Ryoya Kai, Satoru Kaneko, Akifumi Matsuda and Mamoru Yoshimoto 2025 Appl. Phys. Express 18 015501 DOI 10.35848/1882-0786/ada247
WBG semiconductors can save more energy than the annual electricity consumption of Switzerland
In a blog post of 瑞士苏黎世联邦理工学院 , it was said that the estimated energy savings if we adopt WBG semiconductors across the main applications worldwide would be 90.1 TWh/year. This is equivalent to 1.3 times the yearly electricity consumption of Switzerland.
Manuel B. of the Advanced Power Semiconductor Lab (APS) at ETH Zurich focuses on studying the physical properties of SiC to help in the development of next-gen devices. One such innovative design is the super junction (SJ) structure. This design has demonstrated its benefits in conventional materials, promising a 20% reduction in energy losses. However, transferring this design to silicon carbide presents a significant challenge: fabricating the characteristic doping regions of a super junction structure, commonly known as pillars.
In his first publication, Manuel and his colleagues investigated two methodologies to achieve the required ion distribution. The first method consists of exploiting an interesting physical phenomenon observed in crystals called ion channeling. This approach faces technical challenges that require an additional step to better understand the silicon carbide crystal. After addressing these challenges, Manuel and his team concluded that channeling implantations offer advantages for deep implantation and improved homogeneity.
The second method they explored was the ion implantation technology developed by their industry partner, mi2-factory GmbH , known as energy-filtered implantations. Energy filtering achieves outstanding homogeneity while being more limited in deep implantation. The results so far indicate the potential for realizing devices that can enhance the efficiency and reliability of the overall electric grid.
PCIM India in New Delhi in December 2025
The Indian power electronics industry is poised for significant growth in the near to mid-term. With a supportive policy ecosystem and strong government backing, coupled with soaring demand from key application areas, India offers a lucrative opportunity for world’s power electronics majors to invest and expand.
领英推荐
At this opportune time, the globally renowned PCIM ASIA NEW DELHI CONFERENCE event debuts in India as a leadership-level conference and mini expo. The event aims to be the “agent of change” for the Indian power electronics sector, discussing the latest innovations shaping the future of power electronics and offering a platform to explore synergies and opportunities through exchange of insights and high-level networking.
2025 CPES Annual Conference in April
This annual gathering is an opportunity to showcase the research achievements of Center for Power Electronics Systems, Virginia Tech (CPES) over the past year and engage with their partners. The 2025 CPES Annual Conference which takes place on April 14 – 16 in Blacksburg, VA, focuses on addressing the critical challenges faced by power electronics on the path toward a more efficient world. This is highlighted by our three plenary keynotes and one tutorial featuring distinguished leaders from industry and academia: Dr. Deepak Divan , Dr. ashraf lotfi , Dr. Yongdong Li, and Dr. Liyan Zhu .
The conference features over 20 technical oral-session presentations by CPES students highlighting the latest advances. In addition, dynamic lab dialogue sessions, with more than 70 presentations, provide a unique platform for participants to engage deeply with CPES researchers. These sessions include direct discussions, live demonstrations, and insights directly from the lab benches, fostering an interactive exchange of ideas and innovations.
Teradyne and Infineon announce strategic partnership to advance power testing
泰瑞达 and 英飞凌 announced they have entered into a strategic partnership to advance power semiconductor test. As part of the strengthened relationship, Teradyne will acquire part of Infineon’s automated test equipment team (AET) in Regensburg, Germany. This acquisition provides mutual benefits for both companies.
With the additional resources and expertise, Teradyne will accelerate its roadmap in the power semiconductor segment while collaborating on new solutions with a key market leader. By entering into a service agreement, Infineon secures continued manufacturing support as well as enhanced flexibility to respond to internal demand for this specialized test equipment, and benefits from Teradyne’s economy of scale. Teradyne is fully committed to the 80-person team at Infineon’s Regensburg site and plans to build upon these capabilities as it integrates together with its Power Semiconductor business unit.
"Integrating our experienced workforce with Teradyne will help to accelerate innovation and address the dynamic test challenges in new technologies like silicon carbide and gallium nitride at the scale and flexibility needed by our markets and customers. At the same time, we provide our employees with a long-term perspective in a highly specialized company," said Alexander Gorski , Executive Vice President, Frontend Operations at Infineon.
Silicon Carbide News
Wolfspeed beats Q2 revenue as business transition takes hold
Wolfspeed topped Wall Street estimates for second-quarter revenue and reported a smaller-than-expected net loss, as the company made operational changes to accelerate its profitability. Shares rose about 1.2% in extended trading. The company's revenue for the second quarter came in at $180.5 million, compared with an average estimate of $179.9 million. The Mohawk Valley Fab accounted for about $52 million in revenue.
Wolfspeed expects third-quarter revenue from continuing operations to be between $170 million and $200 million, the midpoint of which is below the analysts' average estimate of $193.6 million, according to data compiled by LSEG. For the third quarter of fiscal 2025, the company expects to incur $72 million of restructuring-related costs.
STMicroelectronics’ worst year in decades: sales drop, job cuts
意法半导体 (ST) said it was too early to give guidance for the full year 2025 after it warned that sales would fall further in the first quarter, as the downturn seen in its key markets drags on into the new year. Shares of ST were down 6.8% at €22.18, after touching their lowest price since June 2020 earlier in the session.
Chief executive Jean-Marc Chéry said in a call with analysts that providing guidance for 2025 was difficult due to poor visibility and a persisting inventory correction among customers. "We think it’s fair to consider Q1 as the low point of 2025," Chery added. Ahead of the call, analysts had said investors were nervous about when the bottom of the cycle would be reached.
ST forecasts first quarter revenue of $2.51 billion, implying a nearly 28% drop from a year earlier. The company had already warned in November that its revenue would decline more than usual in the seasonally weak first quarter, but the guidance still missed analysts' expectations of $2.72 billion, LSEG's IBES data showed.
As GuruFocus, LLC reports, ST is considering a workforce reduction of up to 6% through early retirement and natural attrition. This decision comes as the company faces persistently weak demand in the industrial and automotive sectors.
The potential layoffs, which could affect between 2,000 to 3,000 employees, are expected to be announced soon. Operations in both Italy and France are likely to be impacted. However, the final decision regarding the scale of layoffs is still under evaluation.
SiC patent activities end strong in 2024
In the closing quarter of 2024, KnowMade ’s SiC Patent Monitor exhibited robust growth with over 900 new patent families and 400 newly granted patents. This period also witnessed over 100 patents expire or be abandoned and involved 7 notable patent transfers. The industry was devoid of any new IP litigation in the US or patent opposition in Europe during this time. However, the sector is abuzz with 10 notable patent collaborations and an influx of over 25 IP newcomers entering the field.
Continuous innovation within the SiC industry, particularly in bulk and bare wafers segment, has led to the emergence of enhanced substrates and reliable power devices. This quarter, for example, NGK INSULATORS disclosed a composite SiC substrate with a biaxially oriented SiC layer that helps to reduce warpage by controlling a Raman shift value and to prevent breaking and cracking in the substrate during processing by controlling the volume density of base plane dislocations (BDP). Another notable player in the quarter is SICC CO. Ltd which published inventions improving 3D stress distribution and reducing internal stress in large diameter SiC wafers (> 150 mm).
Sumitomo Electric continues to lead IP activities in the epitaxial substrates segment with four new inventions disclosed during the quarter. The technical issues addressed by Sumitomo Electric in its patent publications are many. An invention relates to issues in the epitaxial reactor, such as the presence of SiC particles on the susceptor, causing recesses in the rear surface of SiC epitaxial wafers. Another invention focuses on the reduction of certain defects (bump, pit, carrot, triangular defect, downfall) that can be imaged using a confocal scanning device. Eventually, an invention is more closely related to the related to device reliability and aims to improve recombination efficiency while reducing the required thickness of SiC epilayers, to prevent stacking faults from transferring from the buffer layer to the drift layer.
For the devices segment, it is interesting to note the patenting activity of several Chinese automotive players, such as NIO蔚来 and 中国一汽 . Especially, NIO stands out this quarter with a European patent publication related to SiC trench MOSFET. Other players from the automotive supply chain have been actively filing patents in this space during the quarter such as Bosch (e.g., to improve the short-circuit strength of SiC FET) and Nexperia (e.g., to improve on-resistance and surge performance of SiC Schottky diodes).
In the modules and packaging segment, note that onsemi has disclosed electroless plating methods and systems suitable for SiC devices, and that Mitsubishi Electric is still present with two new inventions, of which one to suppress heat occurring in a SiC MOSFET connected in parallel with a Si IGBT, without providing a temperature detection circuit and a current detection circuit. Furthermore, Navitas Semiconductor , a leading player in the power GaN market, is looking to strengthen its patent portfolio for power SiC, with a new invention providing balanced current flow in SiC power modules.
In the circuits and applications segment, ZF 集团 is also continuing its part, with a method of driving parallel-connected SiC-MOSFET and Si-IGBT based on the rapid detection of the current load of the active (switched-on) device. Furthermore, a collaboration has involved 宝马 with Compound Semiconductor Applications (CSA) Catapult and 英国华威大学 in the UK and led to a new patent publication describing a monitoring device to measure temperature or current in SiC devices under high current load even under rough mechanical conditions (e.g., under strong vibrations, in an automotive appliances).
SiC price controls - Boon or Bane of American competitiveness?
Recently, among other semiconductor technologies, the Biden Administration initiated an investigation of irregular pricing activities from Chinese suppliers of SiC semiconductor substrates. A dramatic price reduction has been noted over the past year, likely due to a combination of reduced demand (relative to the growth trajectory and capacity investment) combined with increasing technological competitiveness from global suppliers.
In the United States, current SiC wafer suppliers of 150-mm wafers include Wolfspeed , Coherent Corp. , SK siltron css , and 安森美半导体 .?Other US suppliers are working to release SiC substrate products, GlobalWafers America and Pallidus, Inc. are in differing development stages.
Kevin Matocha poses the question: Are restrictions on the source of SiC substrates a positive or negative factor in US competitiveness? In this analysis, he delves into the different aspects of this question and what this means to US substrate suppliers and SiC device makers.
Podcast: SiC and its positive impact on energy efficiency of data centers, AI and LMM
Our insatiable appetite for information has gone digital. Once upon a time, knowledge seekers ventured into libraries, thumbing through card catalogs and dusty volumes. Today, we simply speak our questions in the form of a prompt, and artificial minds spring to life with answers. But this convenience comes with a hidden cost - one measured in terawatts.
In this podcast, Nitesh Satheesh answers the question: How can Microchip Technology Inc. help prepare us for the future energy demands data centers and AI will require?
Mahle uses SiC technology from ST in its on-board chargers
To make its next generation of on-board chargers (OBCs) more compact, more efficient, and less costly while reducing average charging times, MAHLE uses new generation components based on SiC technology from 意法半导体 . SiC MOSFETs, SiC-based integrated molded power modules, SiC diodes, as well as other supplementary power products by STMicroelectronics, complement the high-quality components required for charging the batteries of electric vehicles.
Mahle currently offers scalable on-board chargers with power ratings from 3.6 kW to 22 kW. The on-board charger is among Mahle’s focus products for electrification as part of its group strategy and successful series production has been in progress for several generations.
A comparative analysis of PWM methods for Si/SiC hybrid five-level ANPC inverter
A comparative analysis of the hybrid silicon (Si) and silicon carbide (SiC) five-level active neutral point clamp (5L-ANPC) inverter topology with different discontinuous pulse width modulation (DPWM) techniques combined with phase-shifted PWM is presented by researchers at Malaviya National Institute of Technology Jaipur to attain the best performance while minimizing the inverter cost. The emphasis is on various performance parameters to obtain the best operating DPWM technique and cost-effective topology for a 5L-ANPC inverter.
Performance parameters include power losses, efficiency, output voltage, total harmonic distortion (THD), the temperature of various switches, and the cost of the 5L-ANPC topology. Sinusoidal pulse width modulation (SPWM) and various conventional discontinuous PWM are used as modulation signals for three different topologies of 5L-ANPC, which include all SiC, two SiC, and all Si topologies.
The primary benefit of DPWM is its ability to lower switching losses, which enhances efficiency. However, it may also result in additional harmonics in the output voltage when operated at the same carrier frequency. Among all the different proposed combinations of DPWMs and phase-shifted PWM, DPWM1 has the best operating performance. It had minimal power loss and the least THD with the highest efficiency. The DC link voltage balancing was observed with all DPWM, excluding the DPWM MAX and DPWM MIN. A thorough comparative analysis is presented for different DPWM techniques in hybrid inverter topologies using PLECS simulations.
shorabh singh gavar , Shubham Parashar, Sandeep N , (2024). A Comparative Analysis of PWM Method for Si/SiC Hybrid Five-Level ANPC Inverter. In: Gupta, O.H., Kumar Samal, S., Mahanty, R., Singh, B., Colak, I. (eds) Recent Advances in Power Electronics and Drives. EPREC 2024. Lecture Notes in Electrical Engineering, vol 1240. Springer, Singapore. https://doi.org/10.1007/978-981-97-6091-6_10