Ralf’s GaN & SiC News (December 5, 2024)
Welcome to the latest edition of my newsletter on silicon carbide, gallium nitride, and other wide-bandgap semiconductor materials. If you want to get covered, please reach out to me via [email protected]
Content
Breaking News: China stops supplying the US with gallium and germanium
China announced Tuesday it is banning exports to the United States of gallium, germanium, antimony, and other key high-tech materials with potential military applications, as a general principle, lashing back at U.S. limits on semiconductor-related exports.
The Chinese Commerce Ministry announced the move after Washington expanded its list of Chinese companies subject to export controls on computer chip-making equipment, software, and high-bandwidth memory chips. Such chips are needed for advanced applications.
The ratcheting of trade restrictions comes as President-elect Donald Trump has threatened to sharply raise tariffs on imports from China and other countries, potentially intensifying tensions over trade and technology.
China is the biggest global source of gallium and germanium, which are produced in small amounts but are needed to make computer chips for mobile phones, cars, and other products, as well as solar panels and military technology.
The U.S. gets about half its supply of both gallium and germanium metals directly from China, according to the U.S. Geological Survey. China exported about 23 metric tons (25 tons) of gallium in 2022 and produces about 600 metric tons (660 tons) of germanium annually. The U.S. has deposits of such minerals but has not been mining them, though some projects underway are exploring ways to tap those resources.
The export restrictions have had a mixed impact on prices for those critical minerals. The price of antimony more than doubled this year to over $25,000 per ton. Prices for gallium, germanium, and graphite have also mostly risen.
Silicon Carbide News
SICC to start manufacturing 300-mm SiC in 2027
In my last newsletter, I showed the world’s first 300 mm SiC substrate. The team at SICC CO. Ltd of Jinan, China, one of the world’s biggest manufacturers of SiC, took just 18 months to enlarge its n-type boules from 200 mm to 300 mm. But will it impact an industry that is just starting to transition from 150-mm to 200-mm SiC lines? Some may argue that this triumph is of little relevance in the near term, but the company sees the situation differently. SICC anticipates commercialization of 300 mm n-type SiC substrates in small volumes beginning in 2027.
The 300 mm boule, produced using the same axial growth rate employed for manufacturing 200 mm material, has a thickness of around 20 mm. From this ingot (or boule), it is possible to slice around 25 to 35 wafers with a thickness of 500 μm.
Higher defect density on the 300-mm SiC wafers?
Historically, SiC substrates have been plagued with a variety of imperfections that degrade and even kill devices. However, those issues have now been addressed by many companies, and as the process that’s used to fabricate the 300 mm substrate is the same as that used to produce smaller wafers, there is no major barrier to realizing state-of-the-art quality with the larger format.
Encouragingly, one of the critical defects, the micropipe, is not a significant issue in SICC’s n-type 300 mm substrate. With further development, micropipe density is forecast to fall to below 0.2 cm?2, which is a degree of prevalence found in the company’s 200 mm n-type SiC.
Of more concern are basal plane dislocations. However, while this class of defect needs to be reduced, the company is confident it can replicate the density found on its 200 mm n-type substrates.
Efforts will not have to be directed at improving surface roughness. SICC’s 300 mm substrate has a roughness of just 0.2 nm, a figure comparable to that of the company’s 200 mm wafers.
￡51m for Vishay's Newport fab
威世 is to invest ￡51 million ($64.76 million) in the wafer fab in Newport, Wales, which it acquired earlier this year after a forced sale by Nexperia . The investment has been supported by ￡5m ($3.35 million) from the Welsh Government which is also backing other semiconductor companies in the region. The investment will support new lines for power device production and a shift to SiC power devices. Before the Nexperia acquisition, the fab had a small foundry line for GaN devices.
Valeo & ROHM Semiconductor co-develop the next generation of power electronics
法雷奥 and ROHM Semiconductor Europe collaborate to propose and optimize the next generation of power modules for electric motor inverters using their combined expertise in power electronics management. As a first step, ROHM will provide its 2-in-1 SiC molded module TRCDRIVE pack to Valeo for future powertrain solutions. Valeo will start supplying a first series project in early 2026. Valeo and ROHM will contribute to the improvement of efficiency and downsizing of Valeo’s next generation of xEV inverters.
“This partnership marks, for Valeo Power Division, a significant step forward in delivering advanced and highly efficient power electronics,” says Xavier Dupont , Valeo Power Division CEO.
“We are pleased to support Valeo, a renowned automotive supplier, with our power semiconductors. Together, we contribute to the development of highly efficient powertrains by fostering the collaboration with Valeo,” says Wolfram Harnack , President ROHM Semiconductor GmbH.
Ampere and STMicroelectronics collaborate on powerbox with long-term SiC supply
Ampere , the EV player born from 雷诺 , and 意法半导体 (ST) announced the next step in their strategic cooperation, starting in 2026, with a multi-year agreement between ST and Renault Group on the supply of SiC power modules, as part of their collaboration on a powerbox for the inverter for Ampere’s ultra-efficient electric powertrain.
Ampere and ST worked together on the optimization of the power module, the key element in the powerbox, to get the highest performance and best competitiveness in the e-powertrain, leveraging Ampere’s expertise in EV technology and ST’s expertise in advanced power electronics.
“This agreement is the result of the intensive work carried out with STMicroelectronics. By working upstream together, we were able to optimize and secure the supply of key components for our electric powertrains, to offer high performance EVs with increased range and optimized charging time. It perfectly aligns with Ampere’s strategy to master the entire value chain of power electronics for its e-powertrain, leveraging STMicroelectronics’ expertise in power modules,” said Philippe Brunet , SVP Powertrain & EV engineering, Ampere.
Denso and Fuji Electric to get Japanese government aid for SiC power chips
Japan’s industry ministry said last week it will provide aid of up to ￥70.5 billion ($470 million) to auto parts maker DENSO and Fuji Electric Co., Ltd. for the joint production of power semiconductors. By supporting the two companies, the ministry hopes to strengthen domestic production. The total cost for the Denso-Fuji Electric joint power chip business is seen to reach ￥211.6 billion ($1.41 billion).
Denso will expand two facilities to produce substrates for next-generation power semiconductors using SiC that can help reduce electricity consumption significantly. One of the two footholds is in the town of Kota in Aichi Prefecture and the other is in the city of Inabe in neighboring Mie Prefecture. Fuji Electric will expand its plant in the city of Matsumoto, Nagano Prefecture, to manufacture SiC power semiconductors.
Through the collaboration, the companies aim to produce 310,000 units of SiC power semiconductors annually. They will start supplying the chips in May 2027.
Reduced overshoots, oscillations, and dV/dt generation in parallel connected SiC MOSFET modules with optional active current balancing
Current ratings, increased oscillatory switching behavior, large drain-source voltage overshoots, and high output voltage dV/dt levels of available SiC MOSFET modules are all limiting factors to their adoption in medium to high-power applications. The use of inter-device inductances with switching edge skewing has previously been demonstrated as a method of limiting current imbalances when paralleling modules.
This article from researchers at the 英国爱丁堡大学 and Siemens Gamesa Renewable Power Private Limited shows that by precisely controlling the timing skews applied between modules in such arrangements, substantial overshoot, oscillation, and output voltage dV/dt reductions can also be achieved. In addition, if current feedback is included, the module switching order can be varied to facilitate a fixed-skew active current balancing strategy. The mechanisms behind all these effects are analyzed in detail, focusing on the impact of applied timing skew, and inter-device inductance on the improvements.
An experimental investigation validating the current balancing, switching performance improvements, and reduced output voltage dV/dt is also presented using 400 A 1.2 kV half-bridge modules, with up to 4 modules in parallel at a total load current of 1600 A.
Mason Parker , Sebastián Neira, Ed Horsley , Stephen Finney, and Paul Judge , "Reduced Overshoots, Oscillations, and dV/dt Generation in Parallel Connected SiC MOSFET Modules With Optional Active Current Balancing," in IEEE Transactions on Power Electronics, vol. 40, no. 1, pp. 1035-1050, Jan. 2025, doi: 10.1109/TPEL.2024.3453438.
DOE advances grid resilience and reliability with new transformer and SiC packaging projects
The Office of Electricity | U.S. Department of Energy (OE) announced nine projects selected to receive approximately $20 million through its Flexible Innovative Transformer Technologies (FITT) funding opportunity announcement (FOA) to advance key components that will help modernize the grid.
OE also announced the eight winners of the SiC Packaging Prize Phase 1 who will receive $50,000 each in cash prizes (from a $400,000 total prize pool). The total $2.25 million prize, awarded in three phases, is part of the?American-Made Challenges Program, which fosters collaboration between our nation’s entrepreneurs and innovators, DOE’s National Labs, and the private sector.
“The selected projects, which address advanced technology and supply chain challenges, show the ingenuity that will drive the innovation needed for the 21st-century grid,” said Gene Rodrigues, Assistant Secretary for the Office of Electricity. “Advanced transformers and semiconductor packaging will help the power grid to better serve the needs of residents and businesses, ensuring resilient, reliable, secure, and affordable electricity for all Americans.”
The selected FITT projects are:
SiC Prize Phase 1 winners are:
In Phase 2, winning teams from Phase 1 will develop a physical prototype of their SiC packaging solution that meets Phase 2 metrics. In this phase, teams must send their prototypes to a national lab for testing to validate the metrics achieved. At the end of Phase 2, up to four winning teams will receive $250,000 each and become eligible to compete in Phase 3.
Miscellaneous News
Nexperia to comply with U.S. restrictions on Chinese parent Wingtech
Nexperia , a Dutch-based computer chip maker, will comply with U.S. restrictions after its Chinese parent company Wingtech 闻泰科技 was put on the U.S. Department of Commerce 's "entity list", a spokesperson said, as Reuters reports.
"The listing subjects Wingtech’s access to U.S. technology to licensing requirements," the spokesperson said. "These do not apply to Nexperia or its subsidiaries. Nexperia will comply with the U.S. restrictions as these apply to its interactions with Wingtech."
领英推荐
The Commerce Department said on Monday it had added Wingtech and several Chinese investment firms to the list due to their efforts to acquire chip manufacturing technology critical to the defense industry of the U.S. and its allies.
KAUST demonstrates normally off β-Ga?O? monolithic bidirectional switch
In this work, a research team at KAUST (King Abdullah University of Science and Technology) reports on the β-Ga?O? monolithic bidirectional switch. The as-fabricated switch works on enhancement mode operation with a threshold voltage of ～4?V. Maximum drain current density of 1.93?mA/mm is obtained with a drain voltage of 5?V. The bidirectional switch in a bidirectional mode has an ON/OFF current ratio of ～10? with ON-resistance of 1.11 and 1.09?kΩ?·?mm in forward and reverse direction, respectively.
However, in diode mode, the device shows an ON/OFF current ratio of 1.6?×?10? and 1.4?×?10? in forward and reverse conduction modes, respectively. The fabricated β-Ga?O? monolithic bidirectional switch is then used to chop a 60?Hz AC signal at a chopping frequency of 1?kHz, indicating its potential applications in a range of converters.
Dhanu Chettri , Ganesh Mainali , Juan Antonio H. , MRITUNJAY KUMAR , Vishal Khandelwal , Saravanan Yuvaraja, PhD , Xiaohang Li ; Demonstration of normally OFF beta-gallium oxide monolithic bidirectional switch for AC switching applications.?Appl. Phys. Lett.?11 November 2024; 125 (20): 202104.?https://doi.org/10.1063/5.0237484
Diamfab and HiQuTe Diamond partner on synthetic diamond for power electronics
DIAMFAB and HiQuTe Diamond announced a strategic technological partnership. This partnership covers the key stages in the value chain, from substrate production to the manufacture of electronic components, via the epitaxy of doped layers. HiQuTe Diamond will contribute its unique expertise in the production of high-quality diamond substrates, optimized to maximize the performance of power electronics devices. Diamfab will be responsible for the epitaxial growth of doped layers using advanced crystal growth processes, as well as the manufacture of high-performance components.
The two companies plan to begin the collaboration with the manufacture of the first series of vertical Schottky diodes on HiQuTe Diamond substrates using diamond epitaxy optimized by Diamfab. Prototypes are expected in spring 2025.
PELS webinar: The unique AI load features, challenges, and opportunities
As large language models (LLMs) continue to advance various industries, they are driving multi-hundred-billion-dollar investments in AI-centric data/computation centers in the coming years. Alongside well-known concerns regarding sustainability and energy use, there is a growing need to address a less frequently discussed issue: the dynamic and potentially disruptive power consumption patterns of AI infrastructure. These systems, characterized by rapid transients, ultra-low inertia, sharp power surges/dips, span a wide range of power demands—from hundreds of watts to megawatts and even reach gigawatts in near future.
These unique characteristics pose complex challenges for power electronics systems tasked with managing energy conversion and control within data centers and across power grids. Power electronics, already critical for efficient energy management, are becoming even more essential in maintaining grid stability as AI infrastructure introduces these unprecedented load dynamics. The fast-changing power requirements of AI workloads have the potential to cause severe transients, which could impact the reliability and resilience of power grids.
This IEEE Power Electronics Society webinar by Yuzhuo Li from the 加拿大阿尔伯塔大学 will examine the scale and nature of AI-related power consumption, present mathematical models to describe AI workload behavior, and explore the role of power electronics in mitigating the risks associated with LLM-induced transients. By focusing on the interaction between AI infrastructure and power electronics, this session aims to emphasize the importance of interdisciplinary collaboration to ensure the sustainable development of AI technologies while safeguarding the reliability of power grids. It is intended to foster discussion among researchers, engineers, and practitioners in power electronics, encouraging exploration of solutions to these emerging challenges.
Gallium Nitride News
QPT presents qAttach, a novel die-attach process for 15x better heat removal
QPT has just filed a patent for a novel way to attach dies to heat spreaders or substrates called qAttach. As GaN transistor dies are relatively small, there is less surface area to remove heat from. As a result, they are often downrated to enable them to function without overheating. qAttach can remove heat from the die up to 15x better than current techniques so that the GaN chip will not overheat. This opens up GaN to now be efficiently used for next-generation, high power, high voltage applications in automotive, and industrial motors and to finally deliver on the promise of low-cost, high voltage GaN transistors.
QPT’s new structure is a sandwich of heat sink, substrate, qAttach layer, die, qAttach layer, substrate and heat sink with the PCB surrounding the structure at the sides. Because the qAttach layer is ultrathin, heat can be transferred through and away much quicker plus this can also now happen from the top of the die.
This technology has three major benefits over the current sintering process. Firstly, the substrate can be much thinner as the application of the large force needed by sintering is not required. The thinner substrate significantly reduces thermal resistance to further help heat transfer away to the heat sink. Secondly, the lower pressure required for this process means that the manufacturing stresses on the dies are less. This reduces the possibility of device failure which will be of particular interest to automotive companies where reliability is key.
Thirdly, the ultrathin qAttach layer is not a laminar sheet. It has a proprietary geometry that constrains expansion predominantly in the Z axis, which is perpendicular to the qAttach layer when heated. Therefore, delamination of the attach layer from the die and substrate does not occur which is a major issue with current attachment methods. Delamination is the largest cause of failures in power packages so this new approach further improves the reliability of the assembled device.
“Our new qAttach process is a universal solution to solving the growing problem of the removal of waste heat that would otherwise hold back the development of next-generation power electronics. The ability of qAttach to improve transfer heat away from the die by up to 15x can also be used to solve the removal of waste heat from almost any other type of transistors such as Silicon Carbide to enable them to handle higher power loads than they can at present. We already have a couple of leading multinationals interested in licensing this process as they can see the strategic benefits that this innovation would bring to their product lines,” concludes Rob Gwynne , QPT’s CTO.
YESvGaN Colloquium: Power module, application, and demonstrators
The focus of YESvGaN - Wide bandgap power at silicon cost is on the establishment of a new class of vertical GaN-on-foreign-substrates (vGaN) power transistors. These combine the performance benefits of vertical wide-bandgap transistors with the cost advantages of established silicon technology. In this colloquium which will be broadcasted via Teams, the application of the YESvGaN power module and system demonstrators will be discussed.
Dr. Christian Huber , Bosch Research , will provide a project overview outlining the objectives, methods, and results of the YESvGaN project. Anne Sacher, Fraunhofer IISB , will present a vGaN-capable power module in which the gate driver which is integrated directly onto the substrate to optimally connect the driver to the gate. And Prof. Enrique Dede , SiCtech INDUCTION , will demonstrate bidirectional DC-DC converters for EV battery chargers and induction heating inverters as potential areas of application for the YESvGaN half-bridge power module.
Catapult project: Pre-packaged Power Devices for PCB Embedded Power Electronics (P3EP)
UK’s Compound Semiconductor Applications (CSA) Catapult has started the project P3EP (Pre-packaged Power Devices for PCB Embedded Power Electronics) which aims to develop a UK supply chain for PCB-embedded power systems with GaN devices. The project costs are estimated at ￡3.45 million ($4.38 million).
Wide bandgap power devices such as GaN offer extremely high switching speeds and the possibility to significantly reduce system size. However, this can only be exploited with new packaging and module construction methods that increase thermal transfer and reduce parasitic effects.
The emerging technology of embedding power devices into the PCB has proven to be the most advanced way to achieve this goal, which will be exploited in the P3EP project. The P3EP manufacturing chain is based on GaN pre-packages, which have major advantages over bare dies because they allow production testing, characterization, and reliability qualification. This improves yield, cost, and time-to-market for the power electronics, machines, and drives (PEMD) system.
Sener coordinates SAGaN, an international consortium for GaN-based space electronics
Sener coordinates in the international SAGaN consortium, whose objective is the development of next-generation electronic components for especially demanding space missions and applications. Semi Zabala , imec , and DISCO HI-TEC EUROPE GmbH collaborate as partners, and will also be in charge of manufacturing original equipment for spacecraft and instruments that use GaN transistors.
SAGaN aims to develop high-voltage GaN transistors for creating more advanced and efficient electronic equipment for space missions. These transistors offer higher performance than traditional silicon-based components. Therefore, they will enable lighter and more efficient spacecraft that can withstand the extreme conditions of space, including radiation and vacuum-like pressures.
The consortium partners have the experience needed to carry out all operations for creating 650 V GaN transistors from design and manufacturing to processing and testing. This ability to create a complete supply chain for this type of transistor will strengthen Europe’s competitiveness in the aerospace industry.
“SAGaN not only reinforces our commitment to innovation and excellence in the aerospace industry but also has the potential to raise energy efficiency standards in space, reducing the load on power systems and increasing the lifetime of missions,” highlights Miguel Pérez Sánchez-Contador , Power Electronics Coordinator at Sener.
Effect of GaN single crystal substrate characteristics on homo-epitaxial GaN films
In this paper from researchers at 山东大学（威海） , Shandong Crystal GaN Semiconductor, Shandong Urban Construction Vocational College, Qilu University of Technology ( shandong academy of sciences ), and Shandong Jianzhu University , GaN films are grown directly on GaN substrates with completely different characteristics, and it is found that the quality, surface roughness, stress and other characteristics of GaN films are directly related to GaN substrates. The smaller the warpage and roughness of the wafer, the smaller the warpage and surface roughness of GaN film obtained by homo-epitaxy. Alkali etching and multiphoton photoluminescence (MPPL) reveal dislocations in GaN substrate and homo-epitaxial samples.
It was also found that there is a relationship between the strain of the GaN epitaxial layer and the strain of the substrate. Finally, the basic performance of the GaN-based HEMT device was demonstrated. This study can provide a reference for growing higher quality and less defective GaN films, which will be beneficial for further applications of more stable and high-performance GaN-based devices.
Qiubo Li, Guangxia Liu, Shouzhi Wang, Lei Liu, Jiaoxian Yu, Guodong Wang, Peng Cui, Shiying Zhang, Xiangang Xu, and Lei Zhang, The effect of GaN single crystal substrate characteristics on homo-epitaxial GaN films, Surfaces and Interfaces, 2024, 105554, ISSN 2468-0230, https://doi.org/10.1016/j.surfin.2024.105554.
Job Exchange
Post-doctorate at CEA-Leti: Development of vertical GaN power devices
Vertical GaN power devices have been developed on GaN substrates which are at the moment very expensive. GaN layers can also be grown on foreign substrates (such as Si or Sapphire). Pseudo-vertical structures have been proposed to contact the bottom electrode as it must be accessed on its side due to the presence of the foreign substrate. The drawback is in this case an increase of the device footprint. To overcome this limitation, it is proposed to use here layer transfer technologies, based on LETI’s know-how, to access the bottom electrode contact. The proposed work will first consist of defining all the technological steps necessary for the development of vertical GaN power components and then identifying the technological blocks to be developed if necessary before setting up the complete integration. This work will build on actions already undertaken on the transfer of GaN layers. This work is financed within the electronics theme of the French PEPR (Programmes et équipements prioritaires de recherche) and of the “Programme d’investissements d’avenir du plan France Relance”. It addresses a research topic that is identified as key for the development of power electronics converters for industrial and consumer applications. It will be led at CEA-Leti within the Minatec Campus in Grenoble.
Nexperia: (Sr.) Product Engineer GaN
You will join Nexperia 's GaN R&D team, directly contributing to its ability to successfully produce GaN devices.
imec: Researcher GaN MOCVD
You are a member of imec 's Epitaxial Growth group (EPI), which is responsible for the development of new deposition processes and semiconductor device structures in close collaboration with the integration departments running imec’s research programs. As a Senior Researcher on Epitaxial growth, you will be responsible for developing new MOCVD growth processes of GaN and performing related material characterization methods. This activity is primarily carried out in the 200/300 mm cleanroom. With your deep experience in GaN deposition, in device physics of e-mode GaN HEMTs / vertical transistors, in material characterization, and MOCVD hardware, you will also have an advisory and support role for your researcher, engineering, and hardware colleagues.
Applying Semiconductor Knowledge to Your Test Challenges | Training Technical Leaders Using a Skills Based Approach
2 个月Apprieciat the efforr you put into this informative newsletter.
Associate Professor, Advanced Semiconductor Lab at KAUST | (Ultra)wide Bandgap Semiconductor and 3D Stacking
2 个月Thanks for highlighting the first Ga2O3 bidirectional switch (normally off) by my group at KAUST (King Abdullah University of Science and Technology)