Ralf’s GaN & SiC News (August 29, 2024)

Welcome to the latest edition of my newsletter on silicon carbide, gallium nitride, and other wide-bandgap semiconductor materials. If you want to get covered, please reach out to me via [email protected]

Gallium Nitride News

Will a Swedish-Finnish consortium save BelGaN?

As Per Henricsson reports for Elektroniktidningen Sverige AB , a Swedish-Finnish consortium has made an offer to the insolvent GaN foundry BelGaN to revive it as a manufacturer of GaN devices. Formally, the bid was made by the company 7 Semiconductors , registered in Finland. Also, the former owners are said to be interested in buying the bankruptcy estate, and there is a bid from Belgian entrepreneur Guido Dumarey .

“We have been working for almost three years to help Sweden regain its leading role in the semiconductor industry. The original plan was to build a semiconductor factory in Sweden, but then we started talking to BelGan,” says Gerard de Bourbon from the venture capital firm Spirit Ventures . A few years ago, he and his colleague Magnus Ryde received offers to invest billions of dollars in European semiconductor businesses on behalf of Chinese and Russian interests. “This made us wake up and realize that it is strategically important for Europe,” Gerard de Bourbon added.

They engaged advisors from some major semiconductor companies and started trying to raise capital from private investors, funds, and industrial companies. One possible target was BelGan. The group was already in discussions with the company before its bankruptcy. Surprisingly, it filed for bankruptcy at the end of July after the Chinese owners stopped injecting money. Chinese investments are a sensitive topic in Europe, with several recent examples of them being stopped for security reasons.

As the company has been declared bankrupt and the employees are thus given notice, it is urgent. A deal would be worth at least SEK 1.5 billion (USD 150 million) to secure operations. The fab employs 440 people, of whom around 360 could continue to work if the deal goes through. The other 80 could be re-employed once operations have picked up.

As early as 2009, efforts began to transform silicon processes of at least 0.35 μm into GaN power components for the automotive industry. In 2022, the baton was passed to Chinese investors based in Hong Kong. The company changed its name to BelGaN and its focus from silicon to gallium nitride. In addition, the business would be converted to sell the capacity to external customers, to act as a foundry, with a focus on the automotive industry.

Just a week after the bankruptcy, on August 8, BelGaN announced that its first generation of 650V GaN components was ready for production. Gen2 was planned for later this fall and Gen3 for 2025.

Methods for growing GaN single crystals

One of the most notable advantages of GaN lies in its ability to serve as a substrate for the growth of high-quality GaN epitaxial layers. This can dramatically reduce the defect density in the epitaxial layer compared to sapphire substrates.

Nevertheless, the growth of GaN single crystals is a highly challenging process. GaN cannot be melted under normal pressure and decomposes into Ga and nitrogen gas at high temperatures. This characteristic prevents the use of traditional melt methods for growing GaN single crystals, thereby limiting the size and yield of GaN crystals and driving up costs. Currently, a 50-mm (2-inch) GaN wafer is priced as high as $5,000 on the international market, and even at that price, supply remains tight.

To overcome the challenges in growing GaN single crystals, both academia and industry have developed several methods. This blog post from JXT Technology Co.,Ltd. is looking at three of them.

Pulsiv shows GaN-based 65W USB-C reference design with an average efficiency of 95%

With PSV-RDAD-65USB, Pulsiv released a 65-W USB-C reference design with GaN HEMTs developed to address the complex challenges associated with thermal performance in power supplies. The reference design combines Pulsiv OSMIUM technology with an industry-standard QR Flyback and highly optimized, ultra-compact magnetics and GaN transistors from Innoscience . The EQ20 transformer was developed in partnership with the magnetics experts from Frenetic . This results in a 20% size reduction & 50% efficiency improvement compared to an RM8 core typically used in other designs. The peak efficiency is 96%, and the average efficiency is 95%.

At full load, the Flyback transformer reaches a 33.9?K temperature rise at 230?V (AC) and 30.3?K at 265?V above an ambient temperature of +26.1?°C. This might set a new benchmark and enable 65-W fast charging in space-constrained environments and/or heat-sensitive applications such as in-wall plug sockets that incorporate USB-C connectivity.

Silicon Carbide News

Wolfspeed to close its Durham plant

In its fourth quarter and full fiscal year 2024 report, Wolfspeed says it plans to accelerate the shift of device fabrication to its 200-mm Mohawk Valley Fab while assessing the timing of the closure of its 150-mm device fab in Durham. The 200-mm device fab is currently producing solid results – which are at significantly lower costs than its Durham 150-mm fab.

“This improved profitability gives us the confidence to accelerate the shift of our device fabrication to Mohawk Valley, while we assess the timing of the closure of our 150-mm device fab in Durham. At the JP, we have also made great progress, installing and activating initial furnaces in the fourth quarter. We have already processed the first silicon carbide boules from the JP and the quality is in line with the high-quality materials coming out of Building 10,” said Wolfspeed CEO, Gregg Lowe .

Electrothermal power cycling to failure of discrete planar, symmetrical double-trench, and asymmetrical trench SiC MOSFETs

While SiC MOSFETs are now being utilized in industry their robustness under heavy-duty applications remains a concern. In this paper, a research team at the 英国布里斯托大学 presents the results of experimental measurements of degradation to failure of different structured SiC power MOSFETs, namely the planar, symmetrical double-trench, and asymmetrical trench structures following electrothermal stressing by power cycling beyond the safe operating area (SOA) limits.

The tests are categorized into subsets with/without forced cooling. The first set of tests involves successive switching of the devices under constant DC-current supply while their case temperature is monitored in real-time to evaluate their thermal performance. The symmetrical double-trench and asymmetrical trench MOSFETs are found to experience a higher case temperature rise thus prone to breakdown while failure is not observed in the planar structured device.

The second experiment stresses the devices during continuous power cycling with force cooling applied, in which the symmetrical and asymmetrical double-trench MOSFETs still encounter failure with detectable breakdown on the gate oxides, compared with the planar device which only exhibits degradation, without failure, with indications of aging.

The asymmetrical trench MOSFET has the highest level of heat generated in its junction compared with the symmetrical double-trench and planar MOSFETs, respectively. The symmetrical double-trench MOSFET also shows the same failure characteristics but requires more switching cycles until failure while the planar remains functional until the end of the planned experiment.

The measurements are continued with power cycling, where degradation is characterized by the electrical parameters of DUTs. When the cooling time is set as 20 sec, none of the three device structures degrades while with cooling time reduced to 10 sec, both the symmetrical and asymmetrical trench MOSFETs fail with the gate-source terminals short-circuited after intensive switching while the planar MOSFET survived past 1000 cycles with degradation observable on its IV characteristics.

Juefei Yang , Saeed Jahdi , Renze Yu and Bernard Stark , "Electrothermal Power Cycling to Failure of Discrete Planar, Symmetrical Double-Trench and Asymmetrical Trench SiC MOSFETs," in IEEE Open Journal of Power Electronics, vol. 4, pp. 887-899, 2023, doi: 10.1109/OJPEL.2023.3326909.

Series capacitance gate driver to suppress voltage oscillation of SiC MOSFETs

The severe voltage oscillation of SiC MOSFET in switching transient affects the safety of devices and EMI. In this article, a research team of the 中国科学院合肥物质科学研究院 (Hefei Institutes of Physical Science, Chinese Academy of Sciences , and the Central South University propose a series capacitance gate driver (SCGD) to solve this problem.

The series capacitance is charged or discharged in switching transient so that the equivalent driving resistance is gradually increased compared with that of a conventional gate driver, and the voltage oscillation is suppressed. Under the same voltage oscillation level, the average equivalent driving resistance of the SCGD is smaller than that of a conventional gate driver through reasonable parameters design. This means that the optimization of both voltage oscillation and switching loss is realized.

Although an active gate driver has good performance in this respect, the effect may be affected by the delay and control accuracy due to the very short switching transient time of SiC MOSFET. Compared with an active gate driver, the proposed SCGD only adds passive components without any control and has a simple structure. The experimental results verify the effectiveness of SCGD.

Sheng Dou, 黄连生 , Peng Fu, Xiaojiao Chen, Xiuqing Zhang, Shiying He, Zejing Wang, and Jian Yang, "Series Capacitance Gate Driver to Suppress Voltage Oscillation of SiC MOSFET," in IEEE Journal of the Electron Devices Society, vol. 12, pp. 176-186, 2024, doi: 10.1109/JEDS.2024.3349684.

Webinar: SiC - from substrate to device, recent results and future progress

SiC has superior efficiency to (Si) IGBT in the high voltage (600 to 3,300 V) space and the high current (several hundred amperes) field that is in the spotlight with EVs. SiC MOSFET issues to be solved for the SiC market expansion are substrate size, supply and defect density; device on resistance and trade-off with short circuit and bipolar degradation; voltage surge, and ringing linked to fast switching. In particular, the issues of reducing SiC MOSFET chip cost ($/amp) should be a top priority. A review of industry challenges and future development will be presented.

This webinar with Noriyuki Iwamuro 岩室憲幸 , a professor at the University of Tsukuba 筑波大学 , will also focus on how SiC substrates will enable to address those challenges through advanced substrate engineering.

• Date: September 18, 2024
• Time: 10:00 AM CEST, 4:00 PM Beijing time

Design and optimization of 3.3 kV SiC semi-superjunction Schottky power devices

Beyond the “conventional” 650-1700 V blocking voltage space for EV applications, high-voltage (>3 kV), high-current (>100 A) SiC devices have raised commercial interest for traction and PV applications. At 3.3 kV blocking voltage rating, the drift region contribution to the total specific on-resistance (R(on,SP)) becomes dominant. Here, the fundamental advantages of the Superjunction (SJ) concept are of particular interest to help reduce the drift region resistance. Due to cost and fabrication challenges, no commercially available SiC SJ power devices exist.

A team from the 英国华威大学 , the 英国诺丁汉大学 , mqSemi , and the Università degli Studi di Napoli Federico II (UniNa) / University of Naples Federico II offers the semi-SJ concept as a promising solution that can be employed in both Schottky diodes and MOSFETs. The proposed 3.3 kV semi-SJ Schottky diode reduces the R(on,SP) by 9.7%, and with the introduction of a novel termination design blocking is improved by 5.9%, compared to a planar diode.

Kyrylo Melnyk , Arne Benjamin Renz , Qinze Cao, Peter Gammon , Vishal Shah , Neophytos Lophitis , Munaf Rahimo, Iulian Nistor , Ciro Scognamillo , Alessandro Borghese , Luca Maresca, Ph.D. , Andrea Irace , and Marina Antoniou , "Design and Optimization of 3.3 kV Silicon Carbide Semi-Superjunction Schottky Power Devices," 2024 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Bremen, Germany, 2024, pp. 132-135, doi: 10.1109/ISPSD59661.2024.10579567.

Miscellaneous News

Low contact resistivity at the 10ˉ??Ω?cm2 level fabricated directly on n-type AlN

Ultrawide bandgap aluminum nitride (AlN) stands out as a highly attractive material for high-power electronics. However, AlN power devices face performance challenges due to high contact resistivity exceeding 10ˉ1?Ω?cm2.

In this letter, researchers at KAUST (King Abdullah University of Science and Technology) demonstrate achieving a low contact resistivity at the 10ˉ??Ω?cm2 level via refined metallization processes applied directly to n-AlN. The minimum contact resistivity reached 5.82?×?10ˉ??Ω?cm2. An analysis reveals that the low contact resistance primarily results from the stable TiAlTi/AlN interface, resilient even under rigorous annealing conditions, which beneficially forms a thin Al–Ti–N interlayer, promotes substantial nitrogen vacancies, enhances the net carrier density at the interface, and lowers the contact barrier.

This work marks a significant milestone in realizing superior Ohmic contacts for n-type AlN, paving the way for more efficient power electronic and optoelectronic devices.

Haicheng Cao , Mingtao Nong , Jiaqiang Li, Xiao Tang, Tingang Liu, Zhiyuan Liu , Biplab Sarkar , Zhiping Lai , Ying Wu , Xiaohang Li ; Low contact resistivity at the 10ˉ??Ω?cm2 level fabricated directly on n-type AlN. Appl. Phys. Lett. 19 August 2024; 125 (8): 081602. https://doi.org/10.1063/5.0215744

High-current vertical diamond MOSFETs

日本早稻田大学 reports on vertical MOSFETs constructed from diamond with up to 0.7 A maximum drain current. The team claims the 0.7 A drain current as the largest reported so far for diamond FETs. Two of the five researchers involved are also affiliated with Japan-based Power Diamond Systems Inc.

Diamond FET devices are potentially a p-type complement for the n-channel devices that are fabricated in SiC, GaN, and Ga?O? material systems that are being developed for power electronics applications. Complementary MOSFETs would enable CMOS circuit designs, which allow higher-speed operation and smaller gate drive requirements. In the power domain, efficient complementary inverters are wanted for DC/AC conversion of renewable and stored energy sources.

Two epitaxial diamond layers, 0.5-μm undoped and 1.0-μm n-type, were added to a 3?mm x 3?mm x 0.3?mm p+-type boron-doped diamond substrate by microwave plasma chemical vapor deposition (MPCVD). The carbon came from a mix of methane and carbon dioxide. The n-type nitrogen doping was sourced from nitrogen gas.

Nobutaka Oi, Satoshi Okubo, Ikuto Tsuyuzaki, Atsushi Hiraiwa, and Hiroshi Kawarada, "Over 1 A Operation of Vertical-Type Diamond MOSFETs," in IEEE Electron Device Letters, vol. 45, no. 9, pp. 1554-1557, Sept. 2024, doi: 10.1109/LED.2024.3427423.

Optimization of electrostatic seeding technique for wafer-scale diamond fabrication on β-Ga?O?

Integrating diamonds with β- Ga?O? is a promising solution for addressing the problem of poor thermal conductivity and limited p-type dopability of β-Ga?O?. However, growing diamonds on β- Ga?O? is challenging, especially without any interfacial layer, and achieving large-scale uniform diamond films is also tricky.

This paper from a team at Texas State University explores the vital role of an electrostatic seeding technique involving the use of Polydiallyldimethylammonium chloride (PDDAC) polymer with a positive zeta potential and diamond nano slurries with a negative zeta potential to facilitate the integration of diamond with β-Ga?O?. They conduct a detailed analysis of each step of this seeding technique, adjusting the spinning speed of the polymer coating, spinning period, baking period, and ultrasonication period to understand the underlying mechanisms preventing large-scale diamond growth and to identify strategies for achieving wafer-scale diamond fabrication on single crystal β-Ga?O? film. This process facilitates the attainment of a uniform dispersion of diamond nanoparticles on β-Ga?O? at a seeding density of ～1.82 × 1011 cmˉ2.

The optimized seeding technique has enabled the successful growth of wafer-scale diamond films on β-Ga?O?, as confirmed by scanning electron microscopy (SEM). Additionally, the high quality of the diamond film is affirmed by a quality factor of 96.75 % and a narrow full-width half maximum of 10.28 cmˉ1 in the T(2g) peak of the Raman spectra. The X-ray diffraction pattern reinforces the excellent quality of polycrystalline diamond films with minimum stress. In summary, this research provides valuable insights into the polymer-assisted electrostatic seeding technique, paving the way for the uniform growth of wafer-scale diamond films on β-Ga?O?, which is critical for realizing β-Ga?O?-based heterostructure devices.

Imteaz Rahaman , Maria Sultana , Richard Medina , Injamamul Hoque Emu , Ariful Haque , Optimization of electrostatic seeding technique for wafer-scale diamond fabrication on β-Ga?O?, Materials Science in Semiconductor Processing, Volume 184, 2024, 108808, ISSN 1369-8001, https://doi.org/10.1016/j.mssp.2024.108808.