Quickly understand the packaging of electronic components

Quickly understand the packaging of electronic components

Electronic component packaging classification

What is a bag?

Package refers to the circuit pins on the silicon chip that can be connected to external connectors through wires for connection with other devices; package form refers to the housing used to mount the semiconductor integrated circuit chip

It not only plays the role of mounting, fixing, sealing, protecting the chip and enhancing the electrical performance, but also connected to the pins of the package shell through the connection on the chip. Connect other devices to realize the connection between the internal chip and the external circuit

图片无替代文字


And the chip must be isolated from the outside world to prevent impurity corrosion chip circuits in the air, resulting in decreased electrical performance. On the other hand, the encapsulated chip is more convenient for installation and transportation.

There are many types of electronic components in common packaging:

1.?Patch resistance/patch capacitance:

The packaging of resistance capacitors is simply their size. Generally, two size code is represented by: one size code is an EIA (American Electronics Industry Association) code represented by 4 digits. The 0603 packaging refers to the British code; the other is the rice -made code, which is also represented by 4 digits that its unit is millimeter.

Taking 0805 as an example, the packaging size of the SMD patch component is the surface paste device of the British 0805, that is, the public system, which means that the component is long = 2 mm width = 1.2 mm.

SMD patch component encapsulation size types:

Public system: 3216——2012-1608 ——1005 ——0603 ——0402;

British system: 1206 ——0805 — 0603 ——0402 —0201 — 01005.

The following table lists the relationship between British system and public system and detailed size of the patch resistance packaging

图片无替代文字

▲ Resistance resistance package British and public size diagrams

Since the initial stage of surface assembly technology, the development trend has developed in the direction of increasingly passive and active components. The main driving force of the component is portable products (cell phone, knee computer, PDA, etc.). We now have the smallest passive component packaging, 01005 packaging.

2, patch diode:

Name, size and pad distance, packaging name with similar sizes

SMC, 6.8x6-8.0

SMB, 4.5X3.5-5.3

SMA, 4.5X2.5-5.0, SOD-106

SOD-123, 2.7x1.6-3.5, SC-77A

SOD-323, 1.7x1.2-2.5, SC-76/SC-90A

SOD-523, 1.2X0.8-1.6, SC-79

Sod-723, 1.0x0.6-1.4

Sod-923, 0.8x0.6-1.0

图片无替代文字

▲ Diode sample map

3, patch triode:

Name, size and pad distance, packaging name with similar sizes

D2PAK, 10x8.8-2.54, LDPAK

DPAK, 6.5X5.5-2.3, SC-63

SOT-223, 6.5X3.5-2.3, SC-73

SOT-89, 4.5X2.5-1.5, to-243/SC-62/UPAK/MPT3

SOT-23, 2.9X1.5-2.0, SC-59A/SOT-346/MPAK/SMT3

SOT-323, 2.0X1.2-1.3, SC-70/CMPAK/UMT3

SOT-523, 1.6X0.8-1.0, SC-75A/EMT3

SOT-623, 1.4X0.8-0.9, SC-89/MFPAK

SOT-723, 1.2X0.8-0.8

SOT-923, 1.2X0.8-0.8, VMT3

图片无替代文字

▲ Aransal sample map

4.?IC chip/integrated circuit

1. SOP/SOIC encapsulation

SOP is the abbreviation of English Small Outline Package, that is, a small shape package. SOP packaging technology was successfully developed from 1968 to 1969, and the following categories were gradually distributed in the later period:

● SOJ, J -type pins small shape packaging

● TSOP, thin and small shape packaging

● VSOP, very small shape package

● SSOP, narrow -shaped SOP

● TSSOP, thin reduction SOP

● SOT, small shape crystal tube

● SOIC, small shape integrated circu

图片无替代文字



2. DIP packaging

DIP is the abbreviation of English Double In-Line Package, that is, dual-column direct-inserted packaging. One of the packaging packaging, the pins are led from the sides of the packaging, and the packaging materials include plastic and ceramic. DIP is the most commonly used in installation packaging. The application range standard logic IC, memory LSI, microcomputer circuit, etc.

图片无替代文字



3. PLCC package

PLCC is an abbreviation of English Plastic Leaded Chip Carrier, that is, plastic sealing JD chip packaging. The PLCC packaging method, the shape size is much smaller than the DIP packaging, it is square, 32 feet packaged, and there are tube feet around. PLCC packaging is suitable for installing wiring on PCB with SMT surface installation technology, which has the advantages of small shape size and high reliability

图片无替代文字


4. TQFP package

TQFP is the abbreviation of the Thin Quad Flat Package in English, that is, the thin plastic sealing four -corner is flat packaging. The four -sided flat packaging (TQFP) process can effectively use space, thereby reducing the requirements for the space of the printing circuit board. Due to the reduction of height and volume, this packaging process is very suitable for applications with higher space requirements, such as PCMCIA cards and network devices. Almost all Altera's CPLD/FPGA is encapsulated by PQFP


图片无替代文字


5. PQFP package

PQFP is an abbreviation of English Plastic Quad Flat Package, that is, plastic sealing four -corner flat packaging. The distance between the chip pin of the PQFP packaging is very small and the tube is very thin. Generally, the large -scale or large -scale integrated circuit adopts this packaging form, and its pins are generally above 100

图片无替代文字

6. TSOP package

TSOP is an abbreviation of the Thin Small Outline Package in English, which is a thin small size packaging. A typical feature of TSOP memory packaging technology is to make pins around the packaging chip. TSOP is suitable for installing and wiring on PCB (printed circuit board) with SMT technology (surface installation technology). When TSOP encapsulates the shape size, the parasitic parameter (when the current changes sharply, causes the output voltage disturbance), it is suitable for high -frequency applications, the operation is more convenient, and the reliability is relatively high

图片无替代文字

7. BGA installatiBGA is an abbreviation of English Ball Grid Array Package, that is, the ball grid array is encapsulated. With the advancement of technology in the 1990s, chip integration continued to increase, the number of I/O pins increased sharply, the power consumption also increased, and the requirements for integrated circuit packaging were also stricter. To meet the needs of development, BGA packaging has begun to be applied to productionon

图片无替代文字

要查看或添加评论,请登录

Will fu的更多文章

社区洞察

其他会员也浏览了