Power Supply Design Notes: How to Improve Switch-Mode Efficiency

 August 29, 2020 Editorial Staff

Energy efficiency has always played a very important role in the design of power supplies. An inefficient power supply, with non-negligible power losses, entails an additional cost for both the system and the end-user. Let’s not forget that the search for ever-better efficiency levels has led to the transition, especially in power applications, from linear regulators to more efficient switching technology. Let’s now see in detail some techniques that can improve the efficiency of a switch-mode power supply (SMPS).

Active rectification

Synchronous rectifiers, also known as active rectifiers, are used to improve the efficiency of diode rectifier circuits, a stage normally present in switching power supplies. Normal semiconductor diodes are replaced with active components, typically BJT or MOSFET power transistors, which are made to switch at a frequency such as to allow the conversion of the alternating input voltage into direct voltage. These rectifier circuits are called synchronous because the switching must be synchronized with the input waveform. The synchronous rectification (SR) technique can improve efficiency, thermal management, power density, and reliability, reducing the overall cost of the power supply. In the upper part of Figure 1, the classical scheme of a buck converter with rectifier diode is shown, while in the lower part of the same figure, the Schottky diode has been replaced with a MOSFET transistor. The advantage of an active rectifier is that it has much lower conduction resistance and voltage drop than a diode. MOSFET transistors represent the ideal substitute for diodes, as they have a very low RDS(on), as low as a few tens of milliohms or less. The voltage drop on this resistance is therefore much lower than that on a diode. The disadvantage of the SR technique is that it requires a control circuit capable of ensuring synchronization between the switching of the MOSFET and the input waveform.

Figure 1: Example of application of the SR technique

Snubbers and clamps

The snubber has the function of reducing the amplitude of the voltage spike and decreasing the rate of change of a voltage (dV/dt). The effect is to reduce switching losses and radio frequency emissions. The clamp performs a much simpler function; that is, it merely reduces the amplitude of the voltage spike without benefiting the emissions spectrum. In Figure 2, we can see examples of classic clamp and snubber circuits, while Figure 3 shows the effect they produce on a waveform (voltage) characterized by an accentuated ripple.

Figure 2: Examples of clamp and snubber circuits

Figure 3: Effects produced by snubber and clamp

Active clamp circuit

Flyback converters are simple and cheap, but their use is limited in low-power applications (less than 100 W) due to the high-voltage stress to which the switching transistor is subjected. When the switch is on, the flyback converter stores energy in the primary winding of the transformer. During the “off” period, the energy is transferred to the secondary and from there to the output. The current flows both in the primary and secondary windings but never in both simultaneously. Figure 4 shows the scheme of a flyback converter with an active clamp circuit composed of a transistor and a capacitor. The active clamp, compared to the traditional resistor-capacitor-diode (RCD) type, obtain a zero-voltage switching (ZVS) of the transistors with a fixed switching frequency, improving both efficiency and EMI.

Figure 4: Active clamp circuit in a flyback converter

Quasi-resonant circuit

Quasi-resonant topologies are applied to SMPS to reduce or eliminate frequency-dependent switching losses, thus increasing efficiency and lowering the operating temperatures of the device. The disadvantage of this technique, represented by the generation of higher losses at low power, is eliminated by the frequency clamp circuits present in almost all modern power supplies. Quasi-resonant converters typically contain L-C networks whose voltages and currents vary sinusoidally during the switching period. Now consider the classic buck converter scheme, visible in Figure 5. For convenience, the switching circuit containing the MOSFET transistor has been represented with the “switch network” block.

Figure 5: Schematics of a classic buck converter

In Figure 6, we can observe two different configurations for the “switch network” block. The first corresponds to the traditional switching network controlled by a PWM signal. The second, on the other hand, adds quasi-resonant functionality to the circuit thanks to the introduction of an L-C network. The term “zero-current switching” (ZCS) is one of the main advantages of these converters, as it reduces the switching losses. Furthermore, quasi-resonant converters are capable of operating at higher frequencies than those of a similar PWM converter.

Figure 6: Quasi-resonant buck converter

Power factor correction (PFC)

The power factor (PF) is defined as the ratio between real and apparent power. In offline power supplies (that is, power supplies directly connected to the AC mains), both current and voltage are sinusoidal. As a result, the PF is given by the cosine of the phase angle between the input current and the input voltage and is an index of how much the current contributes to the real power available on the load. For example, a PF equal to 1 indicates that 100% of the current contributes to powering the load. International regulations impose a limit on the harmonic content in the input current of many devices powered by the mains voltage, such as TV power supplies, electronic ballasts for lighting, and motor control circuits. A properly designed PFC stage ensures that the current is always in phase with the AC input voltage. Figure 7 shows three different active PFC topologies. The cheapest PFC solution is definitely the boost topology, while the buck-boost PFC solution is able to provide output isolation and adjustable output voltage. Among the three proposals, the buck topology offers the lowest PFC.

Figure 7: Topologies of active PFC

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