PCB Transmission Line: Critical Length, Controlled Impedance and Rise/Fall Time

This article was originally published on the Sierra Circuits blog.

It is the third of the PCB Transmission Line series and follows the articles entitled What is a PCB transmission line? and Signal speed and propagation delay in a PCB transmission line. It was written with the great help of Atar Mittal, Sierra’s Electrical Engineer and General Manager.

When is the length of an interconnection to be considered as a controlled impedance transmission line?

For high-speed or high-frequency signals, we need to consider transmission line effects. But how high is high-speed or high-frequency threshold? Let’s try to answer this and formulate a few thumb rules:

In case of high-frequency analog signals, let the maximum frequency content in the signal = fm Hz.

Critical length lc

For analog signals, the critical length lc is defined as one-fourth of the wavelength of the highest signal frequency contained in the signal.

In case of digital signals, the fastest rise time (or fall time) of a signal pulse is the most important parameters as it defines the transition time from one logic level to another logic level – basically, the transition time of the data bit. For digital signals, the critical length lc is defined as the line length over which the signal propagation time is half of the fastest rise time of the signal pulses.

If tr = fastest rise time of the digital signal, the time of the propagation of the signal over the length lc is tpd.lc = tr/2 (by definition of lc).

This definition implies that the signal should be able to travel from the source over a length lc of the line and then return over the same length lc of the line back to the source point in a total time equal to the rise time tr.

Equations 4a and 4b above are related if we consider the highest frequency content in a digital signal rise time.

The highest frequency content in a digital signal of rise time tr is given by (as per Fourier Analysis):

Which is the same as Equation 4a above.

Shortline

If the line length:

There is a shortline and it is not necessary to consider its transmission line effects, nor to design it as a controlled impedance line.

But if the line length:

It then becomes necessary to consider the transmission line effects and to design such lines as controlled impedance lines.

Example:

If the fastest signal rise time is tr = 1ns, then, assuming the FR4 material with a dielectric constant:

 And the critical length:

Therefore, signal traces longer than 3/1.5 = 2 inches need to be designed as controlled impedance lines. Note here that tr of 1ns corresponds to a maximal signal frequency:

Estimate the rise time from data transfer rate (DTR) or clock frequency

The data transfer rate (DTR) is measured in bits per second (bps or bits/sec or b/s) and the clock frequency (Fclock) in Hz.

DTR usually equals or is greater than 2Fclock. Henceforth, it will be safe to use the following rule:

If we don’t know the signal rise time, we can use the following rule:

Example:

For Fclock = 1GHz or DTR = 2Gbps, and for a PCB material with Er = 4, we get:

3 dB bandwidth

For a signal with rise time tr, the 3 dB bandwidth is given by the following rule:

Therefore, for a clock of frequency Fclock, we get:

In the next and last article of this PCB Transmission Line series, I will explain how to analyze a PCB transmission line using quantities, such as voltages and currents, and line parameters, such as resistance, inductance, capacitance, and conductance.