Partly Shielding POLY resistors
In analog IC design, a number of cases require high value poly resistors to be shielded. This is usually done in order to cancel influence of signals crossing resistor body in metal layers above. This is often done using the first metal layer as a shield connected to the resistor well.
Unfortunately, in some processes metal 1 is not allowed to be placed above resistors body, and using metal 2 to do the job impacts routing capability and metal 2 usage for MIM capacitors.
So, what can be done ?
One idea is using metal 1 lines parallel to resistor body and connected to resistor well. It should somewhat operate as a shield, just an incomplete shield.
Of course, the question is: How efficient is such a shield ?
The only general answer is, well: It has some efficiency... Actual shielding depends on actual geometry, that is defined by design rules and layers thickness.
The process design manual usually does not give a clue about that. So, is there any other approach than guesswork ?
The only approach to get numbers is using a field solver such as EZMod3D to simulate the structure and compare capacitance values without and with partial shield.
In order to study the effect of partial shielding, only a 1 um section of a resistor will be considered, with metal 2 above and well below. Here is what it looks like using KLayout 2.5D viewer:
From an electrostatic standpoint, this structure has 3 ports: Substrate, POLY and Metal2. Equivalent schematic then is made of 3 capacitors. One from M2 to Sub, one from M2 to POLY, one from POLY to Sub.
For these values, DRM data, Calibre extraction and EZMod3D extraction fit well:
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Now, if partial M1 shielding is added:
The shield is placed in order to meet the design rule that forbids M1 over POLY
Now, the stucture still has 3 ports since shield is connected to substrate. So, equivalent schematic is still the same with 3 capacitors, but the values of these have changed. At that point, no help from DRM nor Calibre... Only EZMod3D can provide data (previous values between parenthesis):
So, overall:
How can M2 to POLY be reduced by such a factor ? EZMod3D viewing capabilities gives an answer by displaying current density in dielectric at an arbitrary angular frequency of 1 rad/s:
Color scale on the left (log scale) shows that most current is caught my M1 despite the hole. Current somewhat struggles to reach POLY while is is easily driven to substrate through M1 while a significant part of the current that could get through the hole reaches substrate that is much larger even though a bit further.
In the same way, EZMod3D could be used to choose how to extend M1 to limit current that could flow outside and of course could model what happens at the resistor head and metal connection.
When it comes to analyze phenomenons that are not standard, not described in Design Rule Manuals or not taken into account by standard tools, only Field solvers such as EASII-IC EZMod3D can provide reliable data and push guesswork out of designers field.