Packaging and design should be closely coordinated, "fit" is the best package

HOREXS,The ultra thin FR4 PCB manufacturer/0.1-0,4mm FR4 PCB.

"The World Semiconductor Conference 2020 (World Semiconductor Conference 2020) was held in Nanjing at the end of August. During the conference, Bao Xusheng, Vice President of Technology Marketing of Changjiang Electronics Technology Group, gave a keynote report on "Microsystem Integrated Packaging Exploring New Fields of Differentiated Technology Innovation" , And accepted interviews from the electronic product world and other media after the meeting. Together they discussed the current situation and trend of the packaging industry. The content covered the need for close cooperation between packaging and design. There is no distinction between high-end and low-end packaging. Packaging technology drives Factors, analysis of the respective advantages of fabs and packaging plants in packaging, and many topics such as the packaging direction currently focused on by Changjiang Electronics Technology.

Packaging and design require close cooperation

The integration of chips is getting higher and higher, thanks to advances in design and packaging. In the past, people did not pay enough attention to packaging. When it comes to semiconductors, it is more design or wafer manufacturing. But today, everyone is aware of the importance of packaging. For example, the top three packaging manufacturers in mainland China have a good accumulation and have entered the top 10 in the world. Just as in a company, it is difficult to judge which part of technology, finance or operation is more important, because in fact every aspect is important to the product.

Therefore, when planning a chip project today, it is necessary to conduct collaborative design simulation with the fab, packaging plant and even the system plant from the beginning of the layout of functional modules. For example, the design team of Changjiang Electronics Technology will fully communicate with customers during the design stage, and will continue to increase investment in design simulation in the future, so that Changjiang Electronics Technology can complete the corresponding packaging when the customer's design is released.

Take packaging radio frequency integration technology as an example. Customers need to inform the performance of radio frequency products, chip layout and technical requirements in advance. After that, Changjiang Electronics Technology will arrange the components reasonably according to the process capability, if there is interference, electromagnetic shielding will be added, and the customer will be notified The performance of electromagnetic shielding and the relative situation of internal materials.

It can be seen that chip manufacturing and packaging are technologies that integrate the entire industry chain, which is completely different from the situation where there was no communication at various stages 20 years ago.

Packaging: There is no distinction between high-end and low-end

Which package will become the mainstream package in the future? The industry usually refers to certain technologies as high-end packaging and some as low-end packaging. Is this division reasonable?

In fact, you can imagine the various types of packages as different tools in a toolbox, and use different tools in different applications. From this perspective, there is no difference between "high-end" or "low-end" packaging.

The fundamentals of packaging are interconnection methods (such as WB/wire bonding, FC/flip-chip, RDL/rewiring, TSV/through silicon, DBI, etc.) and substrates (metal frame, ceramic substrate, organic substrate, RDL stack/rewiring stack, Heterogeneous substrates, transfer substrates, etc.), chip and device protection and heat dissipation methods (plastic packaging, cavity, FcBGA and bare chip/WLCSP, etc.), and the combination of different pin forms (Lead, Non-lead, BGA, etc.) .

Advanced packaging mainly involves the reduction of chip thickness and size, and the improvement of its sensitivity to package integration, the reduction of substrate line width and thickness, the reduction of interconnection height and center distance, the reduction of pin center distance, and the packaging The complexity and integration of the body structure are improved, as well as the miniaturization (X/Y/Z direction) of the final package, the improvement of functions and the possible degree of systemization. And advanced SiP (system in package) is a general term for a package of multi-chips and devices with system functions in advanced packages. Corresponding to it is SoC (that is, the system design is integrated on the chip, and then a relatively simple packaging form of SiP is adopted).

There are currently two SiP package types that are of high concern in the industry:

1) Chiplet, which is characterized by the use of Chiplet component chips. It is more commonly found in 2.5D high-end FcBGA packages for high-speed computing and other applications. This kind of packaging is developing rapidly and greatly. The first two fabs have invested heavily in the development of this kind of packaging in the construction plant, mostly for the integration of digital chips.

2) FEM SiP (Front-end Module System-in-Package). Analog chips, such as RF, MEMS, etc., mostly use SiP packages. In this field, OSAT (Packaging and Testing Foundry) has a lot of layout.

It is worth mentioning that although Chiplet SiP used in digital chips and FEM SiP used in RFFE (radio frequency front-end) are currently very hot in the market, it does not mean that these two packages can solve the technical problems of different devices in the industry. solve. It can only be said that these two types of SiP have been more used and promoted advanced packaging technology.

Take the recently-focused “charging pile” as an example. As long as electricity is used, power devices, like IGBTs, are used, and the package used is TO. TO is a packaging technology that appeared very early, and later developed into SOD and SOT with more pins, and later developed to SOP packaging, and even more advanced QFN with more pins. These types of packages have been available for decades. Although people are not paying much attention to them, the packaging technology used in charging piles, fast charging in mobile phones and third-generation semiconductor (silicon carbide, gallium nitride) chips is both It is not Chiplet or FEM SiP, but TO, SOT, SOP, QFN and other basic technologies, but it has been improved and further developed on its basis, such as IPM (Intelligent Power Module) SiP. Therefore, as long as the market application is developing rapidly, the required packaging technology will receive attention and develop rapidly.

It can be seen that whether it is 2.5D/3D packaging, or FEM SiP, or TO, SOT, SOP that uses third-generation semiconductors, they will develop rapidly and attract attention.

Technology drivers for packaging

Demand will not arise for no reason.

? For SiP package, it is divided into Chiplet and FEM SiP

(1) Chiplet. The first driving factor is in the SiP part of the digital category. Because Moore's Law has reached the 5 nm process at the minimum, 3 nm is being developed, and some people are discussing 1 nm; but at the same time, the manufacturing cost is increasing significantly, and not every company can afford a chip of hundreds of millions of yuan. , Tape out. One way of insurance is to make the verified chips into standardized chips, and then use the new wafer process technology to tape out the chips with outstanding core competitiveness, and then use SiP to integrate them together. This creates an impact on Chiplet. The needs of SiP.

(2) FEM SiP. For the analog terminal, in the 5G era, 5G mobile phones must be compatible with 4G and 3G, so the number of components is doubled, but the size of the mobile phone cannot be too large. Moreover, the power consumption of 5G is also relatively large, high power consumption requires higher battery capacity, from 3800 mAh to 4000 mAh, 4500 mAh. The larger and larger battery also means that the space left for the chip is more limited. How to integrate higher and more components in a smaller space? SiP is currently the most effective technology.

? Packaging changes in the automotive electronics field

First of all, the packaging technologies used in automotive electronic products are basically all existing, mass-produced packaging technologies. Because automotive electronics have high requirements for reliability, the packaging technology used must be mass-produced and verified in consumer, computing and other products before it can be used in automotive electronics.

Secondly, more packaging technologies used in automotive electronics are more traditional, but now they have gradually expanded to many high-I/O, high-density packaging technologies, such as WB BGA, FCBGA-SiP, etc. In the past, automotive electronics were more electronic control components, so packaging technologies such as TO, SOP, SOT, and QFN have been applied to automotive electronics for many years. Nowadays, with the emergence of 5G and the expansion of automotive electronic intelligent functions, first of all, the content of some in-vehicle infotainment systems in the cockpit has been extended to some packaging technologies such as Wire Bond. For example, a large screen means that there are many I/Os for the control chip, but it is hoped that it can respond quickly, just as mobile phone users do not want to wait for a while after pressing the screen of the mobile phone to respond. Under this demand, types of packages such as WB BGA and fcCSP are applied to automotive electronic products.

After the advent of ADAS (advanced driver assistance system), such as DMS (fatigue driving warning system), prompts when the driver suddenly becomes sleepy. Under this demand, a new SiP based on FCBGA technology has appeared. And the performance is guaranteed.

At present, there is also Edge computing. After the 5G R16 international standard comes out, it is impossible to upload all signals to the cloud to make decisions, so some calculation decisions need to be done in the car. This requires a core computing unit, similar to the CPU of a server. When it comes to high-performance and high-speed computing, it will use 2.5D/3D packages such as FC-BGA, Chiplet SiP, and 5 nm, 3 nm. Chips, it will take some time to develop.

? Challenges of silicon carbide packaging technology

At present, some customers mainly use SOT, SOP, QFN and TO when using silicon carbide. In fact, after the advent of silicon carbide materials, some of the original packaging technologies are still being used. However, people are trying their best to improve the performance of the package in order to give full play to the characteristics of the material, because silicon carbide itself is very capable, but the "clothing" worn on the outside can't give it its advantage. Therefore, when packaging, the heat dissipation, power, and reliability must be improved, especially in the improvement of electrical performance, because the third-generation semiconductor itself is an improvement in electrical performance.

The respective advantages of fabs and packaging plants in packaging

At present, many foundries are also developing 2.5D and 3D packaging technologies. Will this have an impact on traditional packaging factories?

There is indeed an impact. Because 2.5D and 3D technologies involve many middle-channel packages, which are the continuation of front-end packaging, the fab has technical advantages in the front-end links, such as Si TSV Interposer packaging, 3D micro Bump micro-bumps, or wafer to wafer high-density connection.

Whether it is Interposer or Chiplet, how to integrate these chips with high-density packaging technology is a great technical challenge. For example, 5 or 6 chips are integrated into the package format (FC-BGA) of the flip-chip ball grid array. In this package, a substrate of more than 10L is required and many foreign materials are used. Integrating multiple chips, passive components, and multi-layer substrates in the subsequent links makes such a complicated process very difficult. The packaging factory has certain technical accumulation and technical advantages when solving such problems.

Once entering the 2.5D/3D packaging field, if the yield can only reach 80% or 90%, it cannot be accepted by the market. Because buying only one FC-BGA substrate may cost hundreds of dollars, if the yield is low, it is difficult to survive in the market. The current yield of HOREXS chip carrier board can reach 99.7%, which is one of the very excellent manufacturers in the field of ultra-thin circuit boards.

Therefore, the development of fabs in the 2.5D and 3D technology fields does have a certain impact on packaging plants, because fabs can use their own advantages to continue their competitiveness in the middle wafer level. However, as a packaging factory, Changjiang Electronics Technology also has experience accumulation and technical barriers in the 2.5D and 3D back-end packaging fields, and it is difficult to judge the winner or loser at the moment.

From the perspective of the supply chain, many customers still look forward to a specialized division of labor, hoping that the fab will focus on making chips, and then find other manufacturers to do the packaging alone.

Factors for customers to consider when choosing a packaging plant

It involves the customer's business model. In fact, there are many factors to consider when choosing a chip supplier, such as the customers they serve, the specific needs of the customers, and the area where the terminal products are located. In addition, from the perspective of cost and supply chain security, the demands of fabs and packaging plants are definitely different.

For example, IDM manufacturers are not completely outsourcing manufacturing products. Even if the capacity is dissatisfied, they will entrust other manufacturers to OEM to achieve the effect of multi-party review. It is very dangerous to use a single source of technology. Therefore, many large customers have very strict dual-source policies. After the new product design is completed, if there is only one manufacturer, many customers would rather not do it. This is why after some good packaging technologies have been developed, many large companies dare not adopt it lightly. The main reason is the dual-source policy. Customers do not want to bet on the same company for all technical aspects.

HOREXS focuses on packaging product areas:

1) SiP, such as the sensor carrier board of the Internet of Things, and the new technology products of 5G.

2) Applied to MicroMINILed package.

3) Wafer-level packaging substrate, storage carrier packaging substrate.

4) Used in fast-developing popular packaging types such as automotive electronics and big data storage.

The above-mentioned types of packaging technologies have many similarities in the communication and consumer fields. For example, SiP has applications in both areas. Although different fields still need to make some adjustments in terms of structure, performance, materials, and even cost, as long as efforts are made to develop technologies in the communications field, the needs of customers in other market fields can be well covered. For example, the packaging cost pressure in the consumer sector is relatively high. The materials and processes in the ultra-thin circuit boards produced by HOREXS provide customers with lower-cost versions on the basis of ensuring product quality and reliability.