OS Fundamentals: Part 1, Understanding the hardware, and its abstractions

Unraveling the CPU: From ISA to Microarchitecture – A Glimpse Beyond the Programmer's Model

Ever wondered why Intel's and AMD's x86 based CPU's differ hugely w.r.t speed, performance, power, efficiency. This article is not giving any verdict on which one's the winner. For me both are winners in their own aspects and perspectives. The intend is for the reader to have a basic understanding on what differentiates these two, in general.

At the heart of every general-purpose computer lies three essential components: the CPU, memory, and input/output (I/O) devices like keyboards, mice, monitors, or even networks. Fundamentally, a computer performs a seemingly simple task: it fetches programs (instructions) from memory and executes them one by one. A program is a combination of instructions and data, where the instructions are dictated by the underlying Instruction Set Architecture (ISA) of the processor.

Grasping the fundamentals of?Instruction Set Architecture (ISA)?and?microarchitecture?is essential for understanding how operating systems work at their core. The ISA acts as the interface between software and hardware, defining the set of instructions a CPU can execute. This directly impacts how an OS manages tasks like memory allocation, process management, and I/O operations. On the other hand, microarchitecture determines?how?those instructions are executed, influencing performance, power management, and multi-threading efficiency.

For example, both AMD and Intel desktop processors are based on the x86 ISA. This ISA defines the "programmer's model" of a CPU, detailing how instructions are executed, how memory is accessed, and how registers—such as the accumulator, base register, count register, and program counter—are utilized. The ISA also governs memory segments, like the text/code segment, data segment, and stack.

W.r.t ISA’s we broadly classify the CPU architectures into two:

1.???? Von Neumann Architecture: The same memory stores both instructions and data.

2.???? Harvard Architecture: Instructions and data are stored separately, allowing for simultaneous access to both.

Now, the ISA specifies the basic set of instructions, including arithmetic, logical, load/store, and move operations. It also encompasses specialized instructions for tasks like SIMD (Single Instruction, Multiple Data) and floating-point operations. However, while AMD and Intel both adhere to the x86 ISA, their power, performance, and efficiency vary greatly. Why?

The answer lies in?microarchitecture, the internal design of the CPU, which determines how instructions are executed, how pipelines are managed, and how caches are utilized. Microarchitecture is what makes processors from different manufacturers—while using the same ISA—perform so differently.


Intel's Core-2 microarchitecture implementation of x86 vs AMD's Zen microarchitecture implementation of x86

A Journey Through CPU Microarchitecture

1.???? Early Intel CPUs The journey begins with Intel’s?Pentium?processors in the mid-90s. These CPUs introduced basic pipelining—an early method for instruction parallelism. Instructions could begin execution before the previous one finished, speeding up performance.

2.???? Intel Core 2 Duo (2006) Fast forward to?Core 2 Duo, which made significant leaps by introducing dual cores on a single die. This allowed true parallel processing, meaning two sets of instructions could be executed simultaneously. Intel also improved its branch prediction and instruction pipelines, reducing delays caused by incorrect guesses about which instructions should be executed next.

3.???? Intel Core i Series (2008 and onward) The?Core i?series (i3, i5, i7, and i9) marked a breakthrough in microarchitecture. Intel introduced Hyper-Threading (which allows each core to handle two threads), larger caches, and an advanced instruction pipeline, allowing multiple instructions to flow efficiently. Each generation brought improvements in power efficiency, performance, and the ability to execute more complex instructions faster.

AMD’s Microarchitecture: The Zen Revolution

AMD’s?Zen?architecture, introduced in 2017, signaled a major comeback in the processor market. Zen revolutionized AMD’s approach to microarchitecture:

  • Increased Core Count: AMD packed more cores and threads into their CPUs, making them highly competitive in multi-threaded applications.
  • Efficiency and Power: With Zen, AMD focused on reducing power consumption while maximizing performance. This was achieved by optimizing the instruction pipelines and improving clock speeds without dramatically increasing power usage.
  • Cache Hierarchy: Zen processors introduced a more refined cache hierarchy, reducing latency when accessing frequently used data. Larger and faster caches made instruction execution more efficient.

The Importance of Pipelines, Caches, and Branch Prediction

At the microarchitecture level, the efficiency of a CPU is often determined by its?instruction pipeline—a series of stages through which an instruction passes (fetch, decode, execute, etc.). More advanced microarchitectures have deeper pipelines, allowing more instructions to be in-flight simultaneously, improving throughput. However, deeper pipelines can also result in penalties if instructions are mis-predicted, so CPUs use?branch prediction?algorithms to guess the most likely next instruction.

Caches?also play a critical role. These are small, fast memory units inside the CPU that store frequently accessed data. A well-designed cache hierarchy (L1, L2, and L3 caches) ensures that the CPU spends less time fetching data from slower main memory, significantly boosting performance.

Intel vs. AMD: How Microarchitecture Defines Performance

Even though both Intel and AMD processors are x86-based, their performance can be vastly different because of microarchitectural choices. Intel's?Core?architecture has traditionally focused on higher single-threaded performance, relying on a more refined instruction pipeline, strong branch prediction, and large caches.

AMD’s?Zen?architecture, on the other hand, excels in multi-threaded performance, with more cores and threads per chip, which is advantageous in workloads like video editing and 3D rendering. AMD has also heavily optimized power consumption per performance unit, making their CPUs competitive in both consumer and server markets.

The Two Faces of CPU Architecture: ISA and Microarchitecture

To summarize, every CPU consists of two fundamental architectures:

1.???? Instruction Set Architecture (ISA): The set of instructions that a CPU can execute. This is the "programmer’s view" of the CPU, encompassing registers, memory segments, and the basic instruction set.

2.???? Microarchitecture: The underlying design that implements the ISA. This includes how the CPU handles pipelines, manages caches, handles multiple cores and threads, and executes instructions at the hardware level. Microarchitecture is what differentiates CPUs in terms of power, performance, and efficiency.

While ISA sets the foundation, it’s the microarchitecture that breathes life into the processor, determining how efficiently it can execute instructions and manage resources.


Journey of software code in 'C' to execution on a targeted ISA abstraction of a processor


ISA Abstraction of CPU programmer's model

In future articles, we’ll continue exploring the building blocks of operating systems and computer architecture, understanding how these foundational concepts shape the digital world we interact with every day. We’ll look at how operating systems like Linux leverage underlying microarchitectural nuances—such as cache hierarchies, instruction pipelines, and power states—for performance optimization. Additionally, we’ll dive into binary compatibility, discussing how the ISA serves as the primary target for compilers, while microarchitecture plays a crucial role in fine-tuning performance at the hardware level through optimizations like instruction scheduling and cache usage.

Hemant Bhagat

Senior Staff Engineer at Samsung Semiconductor India Research

1 个月

Very Good article. Simple language. Clear concepts. Looking forward to more chapters in this series. Highly recommend.

Elizabeth Steffy Abraham

Radio Frequency Engineer

1 个月

Very informative Deepesh Menon P M

MELVIN MATHEW

Senior Software Quality Assurance Engineer at Rapita Systems

1 个月

Really good Deepesh. It was a refresher for me after many years. Looking forward for the next one.

Sreekant Kollur

Senior Engineering Specialist at FedEx ACC | Embedded Systems Enthusiast | Firmware, IOT

1 个月

Great Start!. This article is right on the dot. Seedhi baat , No bakwaas. ?? Looking forward!

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