Open to Work
Digital IC engineer is available for work

Open to Work

I have more than 26 years of industry experience and participated in more than 20 product tape-outs. Over the years, I have worked as team member as well as team lead, team manager and director. First we will look at what are the benefits I can offer a company. Then we will look at my requirements (which aren't many).

What do I offer?

  • Expertise in front-end digital IC design (ASIC and FPGA).
  • The whole flow that allows both commercial EDA tools as well as open source tools.
  • I build teams.

Front-end digital IC design

I started as a VHDL designer and verification engineer in the nineties. Back then, we used to have small chips and small teams so we were able to do all front-end tasks. So my experience covers:

  • HDL design: systemverilog and VHDL.
  • Verification with SystemC, systemverilog (UVM) and Python (cocotb).
  • Synthesis and STA.
  • DFT scan patterns but also memBist insertion.
  • Memory selection and generation.
  • NoC (network on chip) design with Arteris tools.
  • LEC: RTL vs pre-layout vs post-layout.
  • Gatelevel sims with zero-delay and timing annotation.
  • Work with backend to follow up clock tree synthesis, floorplan, congestion and timing issues.
  • FPGA prototyping and bare metal embedded software with C.
  • Emulation.

I have experimented and worked a little bit with formal verification apps, but my experience is rather limited. In my free time, it is one of the items that are on my list to explore if there are good open source tools in this area.

Protocol knowledge:

  • AMBA bus: APB, AHB, AXI.
  • Avalon itf.
  • I2S, I2C, SPI, UART, LIN.
  • Ethernet, GbEth.
  • eMMC.
  • USB 1.1, 2.1, 3.1.
  • PCIe 3 and 4.

Processor experience:

  • ARM A53, M0.
  • RISCV.
  • 8051.
  • NIOS, MicroBlaze.

Technology node experience:

  • .18, 90nm, 40nm, 28nm, 16nm, 12nm, ...
  • Xilinx and Altera.

Version control:

  • Git, github and gitlab (the best).
  • SVN, SOS, clearcase, perforce, RCS.

EDA tools:

  • Siemens/Mentor.
  • Cadence.
  • Synopsys.

Hobbies include:

  • Arduino and Arduino based reprap 3D printers and 3D scanning.
  • Raspberry pi for home automation and Grafana dashboarding.
  • FPGA boards: DE0 Nano, DE0 Nano SoC, Digilent Arty S7, ...
  • Open source tools (see also flow).

I have worked on a 3D printer FPGA, started a litecoin and later a bitcoin miner design (never finished). Due to a lack of time, those projects teach me a lot about the technology behind it and the tools rather than lead to a product or offering of my own.

Flow

Here comes the interesting part. I developed a flow based on open source tools that brings:

  • Source file management supporting a whole range of commercial EDA and open source tools for the complete flow.
  • SystemRDL/IP-XACT input for registers that automatically generates the RTL/UVM classes/C/C++/SV register definitions.
  • Markdown based documentation that lives in the repo and is under version control.
  • Allows synthesis and STA for open source PDKs.

Benefits:

  • Everything including documentation under version control.
  • Negotiation power when able to quickly switch tool vendor.
  • Use of open source tools in addition or as alternative for commercial tools.

Team building

An in-office team, a remote team and hybrid teams all have their specific requirements for management style and tools. Assessing a candidate based on technical expertise but also personality features is crucial. Humor is a very important factor that creates bonding and fun in the team. I have built verification and design teams from scratch (ball park 0 -> 10 ppl in a few months time).


What do I search for?

  • A startup mainly or startup mentality. Ready to go for the impossible and the flexibility to jump in with all kind of different skills wherever they are needed.
  • I prefer remote or hybrid roles since I have my favorite IT setup with multiple monitors and a very good chair for my spine.
  • I prefer a leadership role but at the same time, I like to stay close to the people actually doing the work. That means RTL coding, verification, running a synthesis, ... myself. In my spare time I'm also involved in HDL and AI related projects for fun and giggles.
  • I like to see the same enthusiasm and dedication for design and design methodology in the people I work for.



Do your own startup, what do you want to build?

Américo Dias

Analog IC Design Engineer | MBA Candidate

8 个月

It looks much better than most convencional CVs. Best of luck with the search!

Victor Smirnov

HW/SW Co-design, RISC-V, full-stack AI from bare silicon to computational consciousness.

8 个月

cfbr

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