News from RISC-V Summit, Dec 13-14th San Jose, CA

News from RISC-V Summit, Dec 13-14th San Jose, CA

MIPS and Imperas Collaborate on Verification Tools for RISC-V Processors

MIPS has designated Imperas to deliver flexible framework?RISC-V?processor verification tools to simplistically adapt from issue recognition and debug resolution in a testbench ecosystem consistent with the SystemVerilog EDA tools. The provided tools support the open standard RVVI (RISC-V?Verification Interface) with the ability to communicate with a processor. Read more .

Siemens Brings Commercially Accepted Linux Support for RISC-V Architecture

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Siemens Digital Industries Software announced that its security and cloud enabled Sokol Flex OS software, centered around the open-source Yocto Project industry standard, supports RISC-V embedded advancement with its customizable Linux platforms for the RISC-V architecture. “Siemens continues to show leadership within the RISC-V ecosystem with the launch of Sokol Flex OS for RISC-V,” said Krishnakumar Ramamoorthi, senior product marketing manager of Microchip Technology's FPGA business unit. Read more .

Imperas and Imagination Partner to Unleash a Virtual Platform Model Utilizing RISC-V

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?Imperas Software Ltd. , announced that?Imagination Technologies ?will utilize the Imperas model?IMG RTXM-2200 , from Imagination’s RISC-V Catapult family,?as a solution for software design in virtual platforms and EDA environments. The?IMG RTXM-2200 ?is a scalable real time deterministic 32 bit embedded CPU developed for commercially available components. Read more .

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