New ESA project to extend UVVM even further

ESA (the European Space Agency) has just started a new ESA-UVVM project to extend the functionality of this great tool even further.

ESA has initiated several UVVM projects over the last few years, – in order to help the FPGA VHDL community improve their development efficiency and quality. This is particularly important in Europe with 80-90% of all FPGA designers using VHDL for design and verification, but also globally, as VHDL is used by more than 50% of the FPGA community world-wide, And VHDL is in fact dominant for Space, Military and many other high quality dependent applications. The Norwegian Space Agency has understood the importance of FPGA for the Norwegian Electronics Industry and has recognised that UVVM is key to faster and safer development of Embedded Systems.

UVVM is the fastest growing FPGA verification methodology world-wide - independent of HDL - over the last 4 years - acc. to Wilson Research. This ESA project will take UVVM to an even higher level.

We will very soon publish information about the first new features to come out of this project.

Check out various sources of info on UVVM - including an overview of coming webinars and conferences where UVVM is presented.

?UVVM is an open-source verification tool developed by the VHDL community and sponsored by leading industry actors.