My Portfolio of Electronics Developments

I developed a range of electronic devices in my professional career.

Usually, I had to accomplish all tasks which are part of the development procedure: find and define requirements, sketch a concept for the implementation, develop and design a schematic, layout a PCB, build prototypes and small batches, commissioning, quality management.

I want to present a selection as a sample of my work.

1) Analog summation module

Picture: Layout of the summation module

Corresponding Project: Crystal Barrel Calorimeter (particle detector)

Goal: The energy detected in the full calorimeter needs to be determined within 500 ns. To accomplish this, the signals form all 1320 detector modules need to be added in an analog summation module. The required bandwidth is 5MHz.

The application required a feature that allows to tune the weighting of each signal individually. The detector modules vary slightly in their sensitivity. A certain energy deposit results in slightly different signal amplitudes, which has to be compensated.

Solution: A multiplying DAC (MDAC) is used to fine-tune the sensitivities. A PIC microcontroller implements the communication with the data acquisition back-end. ADCs and DACs are used to measure and trim the DC offset. An integrated pulse generator simplifies debugging and commissioning.

Acquired / deepened knowledge: Multiplying DACs, new generation of PIC microcontrollers, malfunction of the integrated ADC when an unrelated pin is biased with a slightly negative voltage (-0.2V), summation of many signals, stability of fast operational amplifiers when operated with large capacitance on the input.

2) Multi channel pulse detector / VME discriminator

Picture: Multi channel pulse detector (right) with gigabit ethernet extension module (left).

Corresponding Project: Crystal Barrel Calorimeter (particle detector)

Goal: Upgrade of the detectors read-out electronics to obtain a fast timing signal which indicates the detection of a paritlce.

Subgoal: The hit signals of the particle detector need to be processed. Pulses need to be detected in a total of 1320 channels. The time of the pulses needs to be measured with a resolution of ~1 ns.

An algorithm needs to identify and count clusters in the hit pattern within 100 ns.

Solution: Signal transformers are used for the differential-to-single-ended conversion. Comparators are used to detect pulses on those signals. Their detection threshold is set using DACs. The comparators’ output signals are processed by FPGAs and a custom firmware performs the time measurement and the clustering.

The modules developed fulfill the VME standard. Each module has 92 input channels. Thus, 16 modules are required for the full detector.

The part of the firmware used to measure the pusle timing resembles a logic analyzer. Deserializers are used to implement a sampling rate of 800MSPS.

Extension: The modules were designed to allow an upgrade of the data connection and transfer hit and time information via gigabit ethernet. This upgrade is implemented as an add-on card (left in the picture above).

During the first years of operation, the data was read from the modules via VME. The more complex implementation of gigabit ethernet required more time but now allows a 100 fold higher transfer rate.

Acquired / deepened knowledge: Usage of signal transformers, techniques to efficiently layout complex designs, clock signal routing in FPGAs, Fail-over clock

3) Cascaded high voltage supply for GEM detectors

Picture: High voltage supply of a GEM detector.

Corresponding project: Triple GEM particle detector

Requirements: A ladder of voltages in steps between 300 and 750 V has to be generated from a single 4.1kV supply. To keep the detector’s sensitivity constant, the voltages have to be stable within 1 V against varying temperature, current load, aging. At the same time, the output current needs to be limited to quench occasional discharges inside the detector. One of the voltages needs to be remotely adjustable.

Optional: Different voltage configurations should be selectable. The actual output voltages should be measured.

Implementation: A voltage divider built up from resistors generates the desired voltages. MOSFETs in source follower configuration are used to stabilize the output voltages. Depletion mode MOSFETs are used to limit the output current. TCR matched voltage dividers are used for monitoring.

Variant 1: Supply for a full-sized detector, up to 13 outputs per voltage level.

Variant 2: HV supply for an R&D detector. One output per voltage level, monitoring of all voltages via 24 bit I2C ADC. Python script for data acquisition on a Raspberry Pi, data logging in influxDB, visualization in Grafana.

Acquired / deepened knowledge: Advanced characteristics of resistors (voltage dependence, temperature dependence, aging), HV transistors, stability of cascaded MOSFETs.

Picture: Voltage monitoring history in Grafana.

4) A few further projects:

A short list of more projects that I implemented successfully:

• High-speed comparator (to detect pulses with a width <1ns)
• HV supply for avalanche photodiodes (450V, feed forward regulation, temperature compensation)
• Discharge simulator (800V discharge inside a detecor. Purpose: Test protection circuit)
• VME-FPGA-Module
• Analog line driver (differential, 50 MHz bandwidth)
• Detector frontend electronics with an ASIC (APV25)
• Shaping signal filter
• Contol loop for a peltier temperature stabilization
• Ultra low latency ECL fanout
• PECL over RJ45 signal distributor
• Passive adapters (maintaining signal integrity)