Is length-matching all when routing high-speed signal bundles on a PCB?

Is length-matching all when routing high-speed signal bundles on a PCB?

Many PCB layout designs are done in a way that bundles of high-speed signal traces like in an address or data bus of a memory system are "length matched". But there is more to be considered. Wheather or not important, will depend on system requirements. Some aspects are demonstrated in this presentation considering the difference in using inner- versus outer-layers for routing. 

https://youtu.be/fURt1us6R8Y


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