IP Requirements for Verifying CHI-Based Designs
Mike BARTLEY
![Mike BARTLEY]()
Mike BARTLEY
SVP at Tessolve Semiconductors Part-time Consultant for Alpinum Consulting and Training
Dimitry Pavlovsky at Cadence provides effective solutions for verifying CHI-based designs by delivering the three major capabilities identified below:
– Stimulus generation: Mimicking all possible scenarios to cover the full verification space
– Coherency checking: Ensuring coherency and system compliance with the CHI specification
– Coverage: Measuring functional coverage and ensuring verification completeness
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