Intel Pushes For New Mask Size
Intel is leading the charge to get the semiconductor industry to adopt a new photomask size standard, but the move presents several challenges.
Used in the production of semiconductors, a photomask or mask is a component that serves as a master template of a unique chip design. The goal among Intel and others is to develop and standardize a new 6- x 12-inch mask size format. The current mask size--6- x 6-inches--isn’t going away and will be used for a long time.
The proposed mask size will make easier to use high-numerical aperture (high-NA) extreme ultraviolet (EUV) lithography, a new and expensive system designed to make chips in the post-2nm era starting around 2028 or sooner. Intel recently obtained ASML’s first high-NA EUV systems.
The mask is key. To make a chip in a fab, a mask is placed in a lithography scanner. The scanner generates light, which is projected through the mask and onto a wafer. Patterns are created on the wafer, which are then processed into chips using various steps.
Today, the world’s most advanced lithography scanners involve ASML’s current EUV systems, which incorporate a 0.33 numerical aperture (NA) lens with 13nm resolutions. EUV is used to make chips at the 7nm node and beyond.
Soon, it will become too complicated to make chips using 0.33 NA EUV, prompting the need for ASML’s high-NA EUV scanners. Still in R&D, high-NA EUV scanners incorporate a different 0.55 NA lens with 8nm resolutions.
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However, high-NA EUV is expensive--each system runs $400 million. And to produce larger chips using high-NA EUV, you must print the device features on two masks and stitch them together. It’s a painful process.
With a 6- x 12-inch mask, you print larger chips on one mask and avoid stitching. But bringing up a new mask size is expensive and complicated.
The first step to make today’s 6- x 6-inch EUV masks is to deposit 40-50 alternating thin layers of silicon and molybdenum materials on a substrate or blank. Making EUV blanks are difficult. They must have few or no defects. The challenges escalate for the proposed 6- x 12-inch format.
The next step in the EUV mask-making process is that you insert the blank in a multi-beam mask writer. This system generates beams that hit the blank, creating patterns on the structure. One company, IMS, sells mask writers for 6- x 6-inch masks. IMS will support the 6- x 12-inch format. Its shareholders include Intel and TSMC, which want 6- x 12-inch masks.
After the mask writer step, the blank is etched and cleaned, thereby creating an EUV mask. The mask is inspected for defects. Lasertec sells EUV mask inspection systems. These tools were in part funded by Intel. Lasertec will likely support 6- x 12-inch masks.
Pellicles are also important. A pellicle is a membrane that protects the mask during the process flow. 6- x 6-inch pellicles were hard to develop. So will future pellicles.
Scientist/Project Manager at TNO
1 年I am wondering if this decision will make EUV high NA tools even more expensive?