IC cost estimation guide

Integrated circuits (ICs) are the backbone of modern electronic devices, powering everything from smartphones and laptops to automobiles and industrial equipment like servers. As the complexity of ICs continues to increase, accurate cost estimation becomes crucial for manufacturers, designers, and businesses alike. We will introduce the semiconductor device family and what IC is for the beginner. Then, briefly share the industry status based on the business model. This article aims to provide a comprehensive overview of IC cost estimation guidance, covering the key factors and approaches involved in determining the cost of producing an integrated circuit.?

Simply said, semiconductor devices can be categorized as IC, Discrete, MEMS, Optoelectronic, and more. Be noticed that the semiconductor device can be categorized in different ways and the way I share is easy for the audience to understand. For those who are not familiar with semiconductor devices, please refer to Appendix A.?

Except for the complexity of semiconductor devices, the cost of devices is different in different business models. There are three general business models of semiconductor industries.?

A. Fabless business model refers to semiconductor companies focusing on designing and marketing semiconductor chips without owning the manufacturing facilities. They typically outsource the fabrication of their chip designs to specialized foundries. Fabless companies invest heavily in research and development (R&D) to design and develop semiconductor chips, including integrated circuits (ICs) and system-on-chip (SoC) solutions. They leverage the expertise of semiconductor foundries for the manufacturing process, which allows them to focus on chip design and innovation. By not investing in manufacturing facilities, fabless companies can be more agile and cost-effective.?

The fabless model enables companies to tap into the expertise and production capabilities of foundries, providing access to advanced manufacturing processes and technologies. Fabless companies often differentiate themselves through innovative chip designs, performance optimization, and providing value-added software or system solutions. Pros: Light capital investment compared with IDM. Cons: Less control in fabrication. One of the good examples is that AMD was with GF until 32nm process node, and then switched to TSMC for a more advanced process node to come out new generation CPU. Would it regard as a value to the "Fabless" business model since it is the flexibility of selecting the right manufacturing partner for business success? What I see today is the more advanced process node used; the more critical to select the foundry, such as TSMC. Apple, Nvidia, Intel, and Tesla all relied on TSMC for the production of the most advanced chips even covering the back-end advanced packaging service. The known companies for the fabless model are MTK, Qualcomm, AMD, Nvidia, Apple, etc.?

B. IDM (Integrated Device Manufacturer) Business Model:

The IDM business model refers to semiconductor companies that perform both the design and manufacturing of their semiconductor products in-house. In this model, IDM companies have their own fabrication facilities, commonly known as fabs, where they manufacture their semiconductor chips. IDM companies have control over the entire semiconductor manufacturing process, from chip design to wafer fabrication, assembly, and testing. This allows for better coordination and optimization of the entire product lifecycle. IDM companies invest heavily in not only R&D to develop their own chip designs, but also manufacturing technologies, and process nodes. The IDM model provides greater control over product specifications, quality, and manufacturing timelines. IDM companies can tailor their manufacturing processes to suit their specific product requirements, achieve economies of scale, and maintain competitive advantages through technological advancements. Pros: 100% control and management from design + manufacturing (Fabrication + packaging + testing) + sales. This model is highly competitive in cost for mature IC/discrete segments. Cons: Heavy capital investment and overhead. As well as It is challenging to have a highly vertically integrated organization to develop new ICs with new process nodes. In the case of Intel, they took a long cycle time to develop new ICs and hard to keep competitive in the foundries. The known companies for the IDM model are Intel, Samsung, SK Hynix, Micron, TI, On-Semi, Infineon, NXP, etc.??

C. IP (Intellectual Property) Design Business Model:

The IP design business model focuses on the development and licensing of semiconductor intellectual property. In this model, companies specialize in designing and developing semiconductor IP, which includes various components such as processor cores, memory controllers, interface protocols, and specialized circuitry. IP design companies invest in R&D to create highly optimized and reusable semiconductor IP blocks that can be integrated into custom SoC designs. They license their IP to fabless companies or IDM companies that incorporate the licensed IP into their own chip designs. By leveraging pre-designed and verified IP blocks, companies can significantly reduce design time, development costs i.e. less IC design changes, meaning less retapouts during the development stage, and reduce the potential risks associated with designing complex semiconductor components from scratch. IP design companies often differentiate themselves through the quality, performance, and versatility of their IP offerings. The IP design model enables companies to focus on specific areas of expertise and leverage the broader ecosystem of chip design and manufacturing. It promotes collaboration and specialization, allowing companies to deliver innovative semiconductor IC solutions efficiently. The known company is ARM which was bought by Softbank in 2016. ARM intends to increase its revenue by changing the royalty based on chip value to finished goods (FG) device value in 2024. Let’s assume the average IC price for a smartphone in Qualcomm is around $40 and $17 in MTK. Based on the existing model, ARM charges the royalty 1% to 2%, then Qualcomm pays $0.4-0.8 to ARM and MTK pays $0.17-0.34. The new charging model proposed by ARM will increase revenue from $3.37-6.74 per smartphone device based on an average sales price of $335 in 2022. Obviously, the cost model of ARM based chip is more complex than fabless or IDM chip.?????

These three semiconductor business models offer different approaches to chip design, manufacturing, and market presence. The choice of a particular model depends on factors such as company resources, expertise, market focus, and strategic objectives.?

As we discussed in cleansheet (https://www.dhirubhai.net/pulse/cleansheet-approach-rob-chang/), the production process of IC is an excellent approach for cost. Let’s start with the substrate selection. High-purity silicon wafers are selected as the base material for semiconductor fabrication. The wafers are typically cylindrical in shape and are sliced from a single crystal ingot (Pictures below cited from Wikipedia and show how ingot is generated and how it looks). The silicon wafers undergo a thorough cleaning process to remove any contaminants, particles, or impurities present on the surface. This step ensures a clean base for subsequent processing. The cleaned wafers may undergo a polishing step to create a smooth and flat surface. Chemical-mechanical polishing (CMP) is commonly used to remove any surface imperfections and provide a uniform surface.

Once the silicon wafer is given, it is not yet conductive. I use the flow chart from Santosh Das’ article to explain the general production process of IC. From a value chain perspective (Simplified), the process before dicing can be called wafer fabrication (Front -end production), and the process after dicing can be called the back-end process which includes die sort (Pick-and-place), Interconnect, package assembly final electrical test, and labeling.?

EDS (Electrical die sorting) is critical to the final IC yield rate. The activities are sorting out the defective chips at the wafer level, fixing defective chips, correcting problems discovered in the FAB or design stage, and sorting out defective chips beforehand to improve the efficiency of the following packaging and testing steps. Yield is the percentage of good chips and the maximum chip count on a single wafer.?

In terms of the Supply Chain, you may see the physical flow as below. The transaction can happen in any node below. For example, the fabless company may use Know-good-die strategy or the Wafer-Buy strategy after the wafer test (EDS). The Wafer-buy model is 2-4% lower than Know-good-die model due to the removal of the foundry management fee. After dicing, die can be stored temporarily in die bank and then grouped or degrouped to different back-end production fabs based on needs, which makes the supply chain more complicated to manage.

The cost model in the following discussion doesn’t apply to ARM chips, which means IP licensing and royalty are not in our scope.?

Major cost drivers are listed:?

1. The complexity of circuit:

The complexity of an IC design plays a significant role in estimating its cost. The number of transistors, layers, and interconnects, as well as the design's architectural intricacy, impact the fabrication and manufacturing processes, which in turn affect the overall cost. More complex designs often require advanced manufacturing technologies, multiple masks, and longer processing times (A circuit structure may take 15 to 200 days to build), leading to higher production costs.?

2. Volume: It's important to note that the relationship between volume and cost reduction may vary depending on factors such as the complexity of the IC design, the technology node, and market conditions. Additionally, there may be diminishing returns to scale, where the cost reductions may start to level off after reaching a certain breakeven volume. Higher volume in IC design means the significant initial investment in equipment, R&D, engineering, and mask set fabrication can be spread over the total product life volume and lower the cost per unit. High volume in production usually represents the willingness of supplier to offer volume discounts to secure the long-term contract and strengthen the bargaining power of buyers. Higher volume/demand typically results in the benefit in the learning curve of semiconductor manufacturing and yield improvement.?

3. Process Technology:

The choice of process technology is another critical factor influencing IC cost estimation. Advanced process nodes, such as 7nm or 5nm, offer higher transistor density, lower power consumption, and improved performance but tend to be more expensive. Older process nodes may be more cost-effective for certain applications. Additionally, specialized process technologies for specific functionalities, such as radio-frequency (RF) or high-voltage devices, may incur additional costs.?

• Mask/reticle: IC masks are a significant cost component in the semiconductor manufacturing process, especially for advanced technology nodes. The fabrication of IC masks involves the production of photomasks, which are high-precision templates used in the photolithography step to transfer the circuit patterns onto the semiconductor substrate. The cost of an individual IC mask set can range from tens of thousands to several hundred thousand dollars. For advanced technology nodes and complex designs, the cost can be even higher. Additionally, the cost may increase for multiple masks required for different layers of the semiconductor fabrication process. It's important to note that the cost of IC masks is typically borne by semiconductor design companies or chip manufacturers. The mask cost can be a part of the overall manufacturing cost, which also includes other expenses such as wafer fabrication, testing, packaging, and yield optimization. The exact pricing of IC masks can vary significantly based on factors such as negotiation with the mask vendor, volume production discounts, and the specific requirements of the design. Semiconductor manufacturers and foundries typically work closely with mask suppliers to optimize costs while ensuring the quality and precision of the masks for successful fabrication.?

• Process node and the mask count: Mask count was increased and costy because more advanced process node is used and the complexity of chip design (metal layer and density) grows more complicated. However, by the drawing below EUV reduces mask counts. Selecting the right process nodes is critical for a fabless company. Mask cost is cheaper when mature process node is selected. However, the early adaptors of new process node allow the company to be benefit from better performance, smaller size, low power consumption.????

4. Wafer Size and die size:

The size of the silicon wafer used in the manufacturing process significantly impacts IC cost estimation. Larger wafers, such as 300mm (12 inches) or 450mm (17.7 inches), offer higher economies of scale, allowing more chips to be produced simultaneously. This leads to lower production costs per chip compared to smaller wafer sizes like 200mm (8 inches). However, larger wafers require specialized fabrication facilities and equipment, which can increase initial setup costs. The following table is the wafer size development history from Wiki.?

Smaller die size usually represents higher throughput, higher yield, and cheaper cost.?

However, it may not be true when more advance process nodes are used (Such as 2-3nm) with EUV lithography scanner. Dylan Patel provides an interesting article and shares the opinion, “Smaller isn’t always better” by scenario and cost analysis. https://www.semianalysis.com/p/die-size-and-reticle-conundrum-cost

5. Yield and Defect Density:

The yield, or the percentage of working chips on a wafer, is a crucial factor affecting IC cost estimation. The higher the yield, the lower the cost per chip. Defect density, which refers to the number of defects per unit area, impacts yield. Advanced process nodes often have higher defect densities due to increased complexity, leading to lower yield and higher costs. Yield improvement techniques, such as design-for-manufacturability (DFM) practices, are employed to mitigate this issue. The following pictures show the good die yield rate comparison based on the same wafer size. Larger die sizes typically have lower wafer yield.??

6. Packaging and Testing:

The packaging and testing stages of IC manufacturing also contribute to the overall cost estimation. Packaging options vary, ranging from simple through-hole packages to advanced ball grid arrays (BGAs) or system-in-package (SiP) solutions. The choice of packaging technology depends on the IC's functionality, size, and cost targets. Generally, two activities in packaging: Wire bond assembly and Encapsulation. Wire bonding typically uses gold wire, although you can use copper wire instead if you have a nitrogen-rich assembly environment. Wedge-bonding with aluminum wire can be an economical alternative. Ultrasonic bonding starts with a wire feed through a hole in the surface of a component assembly. The process includes a die and substrate bond. Thermosonic bonding is a process used to connect silicon ICs to computers. The process assembles the components of central processing units, which integrate the circuitry of personal computers and laptops. Thermocompression bonding is a method that joins two metals through a mix of force and heat. The method is alternately called wafer bonding, diffusion bonding, solid-state welding, and pressure joining. Thermocompression bonding protects electrical structures and device packages in advance of surface mounting. The method includes the diffusion of the surface and grain boundary. The type of wire bonding and the number of pins are direct cost drivers.?

Encapsulations are the last piece of the IC package and serve to protect the conductor and wires from environmental and physical damage. They can be made from epoxy or epoxy blends, silicone, or polyimide. The rest of the components you choose will depend upon the specific needs of your integrated circuits and your applications.

There is a great article written by Majeed Ahmad, “Lost in the advanced IC packaging labyrinth? Know these 10 basic terms” (https://www.edn.com/lost-in-the-advanced-ic-packaging-labyrinth-know-these-10-basic-terms/?_ga=2.161764148.927922173.1687274283-870268763.1687274283&_gl=1*b2w1li*_ga*ODcwMjY4NzYzLjE2ODcyNzQyODM.*_ga_ZLV02RYCZ8*MTY4NzI3NDI4My4xLjEuMTY4NzI3NDQxNC4wLjAuMA.) The article includes the introduction of the latest advanced packaging technology including InFO, COWOS, Fan-out wafer-level packaging, etc.?

Testing processes, including wafer-level testing and final package testing, help identify defective chips and ensure quality. These steps (Wafer test description) add to the overall cost of IC production.?

7. Product life cycle impact on semiconductors: It is important to know that the pricing of an IC can change in the different product life cycles.?

Last but not the list, I summarized the key IC cost driver in order, the complexity of the circuit, volume, process technology (Mask and process node and mask count), wafer size and die size, yield and defect density, packaging and testing, and the product life cycle impact. If separate the customizability (NOT customization) of IC into three levels: The high customizability IC is something like logic and CMOS which may require advanced process technology. The cost model can be various in different cases and scenarios. The customizability of low-power ASIC, FPGA, and microcontrollers is low. The process technology is relatively mature. My experience is that high-volume device pricing is highly correlated to distributor pricing. If you are short of resources to do the cost analysis, check prices from different distributors and you may have some estimations. The customizability of IC with multiple die packages is moderate. I will suggest focusing on back-end processes which include assembly and test and/or the outsourced semiconductor assembly and test (OSAT) vendors. In the stock market, we have a slogan: “Volume is king.” This is especially true in IC industry and that is why early adaptation of new technology takes so much focus nowadays.????

Approaches to IC Cost Estimation:

a. Top-Down Estimation:

The top-down approach involves considering the overall system-level requirements and determining the IC cost based on similar designs or historical data. This method provides a rough estimate during the early stages of a project, allowing for quick feasibility assessments.

b. Bottom-Up Estimation:

The bottom-up approach involves breaking down the IC design into individual components, such as transistors, interconnects, and packaging, and estimating the costs associated with each element and their corresponding manufacturing cost.

Appendix A: Introduction of semiconductor devices:

1. Diodes:

Diodes are basic semiconductor devices that allow current to flow in one direction while blocking it in the opposite direction. They are used for rectification, signal detection, and voltage clamping in circuits.

2. Transistors:

Transistors are fundamental devices used for amplification, switching, and signal processing. They come in different types such as bipolar junction transistors (BJTs) and field-effect transistors (FETs). Transistors are key components in integrated circuits and serve as building blocks for many electronic systems.

3. Integrated Circuits (ICs):

Integrated circuits, or ICs, are complete electronic circuits fabricated on a single chip of semiconductor material. They can contain thousands or even millions of electronic components, such as transistors, resistors, capacitors, and more. ICs revolutionized electronics by enabling compact, efficient, and highly integrated systems.

4. Sensors:

Semiconductor sensors are devices that detect and measure physical quantities such as temperature, pressure, light, motion, and more. They convert these physical inputs into electrical signals for further processing. Sensors find applications in various fields, including automotive, healthcare, industrial, and environmental monitoring.

5. Thyristors:

Thyristors are semiconductor devices used for controlling and switching high-power electrical currents. They are capable of handling high voltages and are commonly used in power electronics applications, such as motor drives, AC power control, and voltage regulation.

6. Optoelectronic Devices:

Optoelectronic devices involve the interaction between light and semiconductors. They include light-emitting diodes (LEDs), photodiodes, laser diodes, and optocouplers. These devices find applications in displays, lighting, communication systems, optical sensing, and more.

7. Memory Devices:

Memory devices store and retrieve data in electronic systems. Common semiconductor memory devices include dynamic random-access memory (DRAM), static random-access memory (SRAM), and flash memory. They are used in computers, smartphones, and other digital devices for data storage and retrieval.

8. Microprocessors and Microcontrollers:

Microprocessors and microcontrollers are advanced ICs that contain a central processing unit (CPU) along with memory and input/output interfaces. Microprocessors power computers and provide general-purpose computing capabilities, while microcontrollers are designed for specific control and embedded system applications.

9. Power Devices:

Power semiconductor devices are designed to handle high voltages and currents in power electronic systems. Examples include power diodes, power transistors (such as MOSFETs and IGBTs), and thyristors. Power devices are used in applications like power supplies, motor drives, electric vehicles, and renewable energy systems.

Appendix B: The difference between IC and CPU:

In hardware, a CPU is an integrated circuit, also known as a chip. An integrated circuit integrates a lot of tiny electrical components (Transistors, diode, resistor, capacitors, etc.) into circuits and fitting them into a compact package. An IC is a more specific device designed to perform specific functions. The types of IC are memory chips, ASIC, RFIC (For wireless communication), Power Management IC (Voltage regulation and conversion), Digital IC, Analog IC (Examples are amplifier and voltage regulators), Mixed-Signal IC. In the other hand, CPU can execute instructions and perform various operations on data, especially in computing tasks. The types of CPU are general purpose, Digital Signal Processor (DSP: Processing audio and video data), Embedded microprocessor, GPU, SoC (For mobile or other small electrical devices), FPGAs. Please refer to more details at https://www.electronicshub.org/microprocessor-vs-integrated-circuit/.?

Appendix C: How to calculate the total die number on a wafer? Here comes the most common calculation formula:?

However, one should be aware that the shape of the die is square or rectangular but the wafer is round shape. There must be some wasted space on the wafer. Production will also produce defective dies and partial dies. Our goal is GOOD dies per wafer not just dies per wafer.??