How are semiconductors made?
?DEVELOPING A WORLD-CLASS, OPEN-SYSTEM FOUNDRY
Intel Foundry Services (IFS) is developing a?world-class,?open-system foundry,?leading?the industry transition from the standard monolithic system-on-chip to “systems of chips” in a package. Our unique and combined offerings
of?wafer fabrication,?advanced process?and?packaging technology,?chipset standards, software, robust ecosystem, and?assembly?and test?capabilities will help our customers?build innovative silicon designs and deliver full end-to-end customizable products. The U.S. Department of Defense (DoD) needs leading-edge, onshore, advanced foundry and packaging capabilities more than ever, and IFS is helping the U.S. government make a secure transition to commercial foundries to help protect national security. As the prime contractor on both?RAMP-C?and?SHIP?programs and with our secure design, manufacturing, and packaging, Intel provides DoD the end-to-end ability to leverage these capabilities in the United States.
Returning Process Technology Leadership to the U.S.
Intel is pioneering the industry’s first glass substrates for next-generation advanced packaging, planned for the latter part of this decade. This breakthrough achievement will enable the continued scaling of transistors in a package and advance Moore’s Law to deliver data-centric applications. While it is becoming exponentially more challenging to keep pace with Moore's Law as the industry aspires to deliver 1 trillion transistors on a single device by 2030, Intel is executing on or ahead of schedule to deliver five process nodes in four years and return process technology leadership to the U.S. by 2025 with robust investment plans to maintain that leadership once regained.
Creating Local Talent Pipelines
Through innovative partnerships with government and academia, Intel is leading the way to create a robust and diverse ecosystem of skilled semiconductor talent, which is critical to the success of the entire semiconductor industry and the U.S. economy. Intel announced a $100 million investment last year to expand semiconductor education, research, and workforce training opportunities across the nation, which includes a $50 million partnership with the National Science Foundation and?$50 million?to fund the?Semiconductor Education and Research Program (SERP) for Ohio?– a collaborative, multi-institution program designed to directly support our new operations in Ohio. Through this program, for example, Columbus State Community College has taken the lead in developing a one-year semiconductor technician certificate program. Intel announced a $100 million investment last year to expand semiconductor education, research, and workforce training opportunities across the nation. This includes a $50 million match for a total $100 million partnership with the National Science Foundation to expand opportunities in the United States.
In Arizona and Oregon, partnered with Maricopa and Portland community college systems to launch a first-of-its-kind semiconductor technician?Quick Start?program. This accelerated two-week program, led by Intel employees, provides free hands-on learning to prepare students for rewarding careers as semiconductor technicians. Once given little attention in chip making, packages are changing how chips are designed and created – and, ultimately, what chips can do. The passage of the CHIPS and Science Act shined a spotlight on the critical need to invest in U.S. domestic semiconductor manufacturing.
1.??? US Semiconductor Manufacturing, CHIPS Act
America’s Semiconductor Leadership begins with Intel Powered by the promises of the CHIPS Act, Intel is introducing investment of over ?$100 billion to increase domestic chip manufacturing capacity and capabilities. Investing in U.S.-based Technology Development and American Manufacturing. Intel is leading the way to revitalize American semiconductor manufacturing and R & D to make a more resilient global supply chain. Over the course of five years, Intel expects to invest more than $100 billion in the U.S. as we expand our capacity and capabilities in Arizona, New Mexico, Oregon, and Ohio. These investments, depending on adequate CHIPS support, will fill several essential domestic supply chain gaps and are vital to U.S. economic and national security.
????Oregon: The Heart of Semiconductor Research and Development expect to add several thousand new permanent and construction jobs.
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The future of American semiconductor manufacturing starts in Oregon, which is home to Intel’s innovation hub for leading-edge semiconductor research, technology development, and manufacturing. Intel is planning a multibillion-dollar expansion and modernization of our facilities in Oregon that will keep us on track to process technology leadership by 2025.
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Arizona: Innovating and Investing for more than 40 years
Intel is expanding its operations in Arizona with two new leading-edge semiconductor factories that are estimated to cost $15 billion to $20 billion each—the largest private sector investment in the state’s history. The new factories will support the growing demand for Intel’s products and provide committed capacity for Intel Foundry Services customers.
New Mexico: Pushing the Limits of Advanced Packaging
Intel is investing $3.5 billion in its?New Mexico?operations to enable the production of its advanced semiconductor packaging technology, including Foveros, Intel’s breakthrough 3D packaging technology. This technology allows us to mix and match compute tiles to meet increasing computing performance needs for artificial intelligence, 5G, and the edge.
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Ohio: Building the Silicon Heartland
Intel’s greenfield investment of more than $20 billion to build two new leading-edge fabs in Ohio marks the single largest private-sector investment in the state's history. This “Silicon Heartland” will establish a new regional economic cluster for U.S. chip-making and become an epicenter of leading-edge technology.
领英推荐
?? As we know that the only leading edge ?U.S. semiconductor company that both develops and manufactures its own technology, Intel has a widespread economic impact in every sector of the U.S. economy: Intel is committed to doubling down on our U.S. investments to bring more manufacturing and technology leadership to the U.S. Powered by the promises of the CHIPS and Science Act, their new investments are expected to create an additional 9.73k new Intel jobs.
?6 crucial steps in semiconductor manufacturing
DEPOSITION, RESIST, LITHOGRAPHY, ETCH, IONIZATION, PACKAGING:?
We will have heard word on the street: a new iPhone 15 is here. But it’s under the hood of this iPhone – and other digital devices – where things really get interesting. That’s where top-of-the-line chips like Apple’s A17 Pro and A16 Bionic SoCs are making new, innovative technology possible. So how are these chips made and what are the most important steps? We don’t need to tell you that modern digital devices – smartphones, PCs, gaming consoles, and more – are powerful pieces of technology. Much of this power comes from microchips, some of the smallest but most detailed pieces of tech that exist. In 2021, semiconductor unit sales reached a record 1.15 trillion shipments. That’s about 145 chips for every person on earth. But despite what their widespread presence might suggest, manufacturing a microchip is no mean feat. To make any chip, numerous processes play a role. Let’s discuss six critical semiconductor manufacturing steps: deposition, photoresist, lithography, etch, ionization, and packaging.
DEPOSITION
The process begins with a silicon wafer. Wafers are sliced from a salami-shaped bar of 99.99% pure silicon (known as an 'ingot') and polished to extreme smoothness. Thin films of conducting, isolating, or semiconducting materials – depending on the type of structure being made – are deposited on the wafer to enable the first layer to be printed on it. This important step is commonly known as 'deposition'. As microchip structures 'shrink', the process of patterning the wafer becomes more complex. Advances in deposition, as well as etch and lithography – more on that later – are enablers of shrink and the pursuit of Moore's Law. These advances include the use of new materials and innovations that enable increased precision when depositing these materials.
Photoresist coating
The wafer is then covered with a light-sensitive coating called 'photoresist', or 'resist' for short. There are two types of resistance: positive and negative. The main difference between positive and negative resist is the chemical structure of the material and the way that the resist reacts with light. With positive resistance, the areas exposed to ultraviolet light change their structure and are made more soluble – ready for etching and deposition. The opposite is true for negative resist, where areas hit by light polymerize, meaning they become stronger and more difficult to dissolve. Positive resist is most commonly used in semiconductor manufacturing because its higher resolution capability makes it the better choice for the lithography stage. Several companies around the world produce resist for semiconductor manufacturing, such as Fujifilm Electronics Materials, The Dow Chemical Company, and JSR Corporation.
Lithography
Lithography is a crucial step in the chip-making process because it determines just how small the transistors on a chip can be. During this stage, the chip wafer is inserted into a?lithography machine?(that's us!) where it's exposed to deep ultraviolet (DUV) or extreme ultraviolet (EUV) light. This light has a wavelength anywhere from 365 nm for less complex chip designs to 13.5 nm, which is used to produce some of the finest details of a chip – some of which are thousands of times smaller than a grain of sand. Light is projected onto the wafer through the 'reticle', which holds the blueprint of the pattern to be printed. The?system's optics?(lenses in a DUV system and mirrors in an EUV system) shrink and focus the pattern onto the resist layer. As explained earlier, when light hits the resist, it causes a chemical change that enables the pattern from the reticle to be replicated onto the resist layer.
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Getting the pattern exactly right every time is a tricky task. Particle interference, refraction, and other physical or chemical defects can occur during this process. That's why, sometimes, the pattern needs to be optimized by intentionally deforming the blueprint, so you're left with the exact pattern that you need. Our systems do this by combining algorithmic models with data from our systems and test wafers in a process referred to as 'computational lithography'. The resulting blueprint might look different from the pattern it eventually prints, but that's exactly the point. Everything we do is focused on getting the printed patterns just right.
ETCH
The next step is to remove the degraded resist to reveal the intended pattern. During 'etch', the wafer is baked and developed, and some of the resists is washed away to reveal a 3D pattern of open channels. Etch processes must precisely and consistently form increasingly conductive features without impacting the overall integrity and stability of the chip structure. Advanced etch technology is enabling chipmakers to use double, quadruple, and spacer-based patterning to create the tiny features of the most modern chip designs. As with resist, there are two types of etching: 'wet' and 'dry'. Dry etching uses gases to define the exposed pattern on the wafer. Wet etching uses chemical baths to wash the wafer. Companies such as Lam Research, Oxford Instruments, and SEMES develop semiconductor etching systems.
Chips are made up of dozens of layers. So, it's important that etching is carefully controlled so as not to damage the underlying layers of a multilayer microchip structure or – if the etching is intended to create a cavity in the structure – to ensure the depth of the cavity is exactly right. When you consider that some microchip designs such as?3D NAND?are reaching up to 175 layers, this step is becoming increasingly important – and difficult.
Ion implantation
?Once patterns are etched in the wafer, the wafer may be bombarded with positive or negative ions to tune the electrical conducting properties of part of the pattern. Raw silicon – the material the wafer is made of – is not a perfect insulator or a perfect conductor. Silicon’s electrical properties are somewhere in between. Directing electrically charged ions into the silicon crystal allows the flow of electricity to be controlled and transistors – the electronic switches that are the basic building blocks of microchips – to be created. This process is known as ‘ion implantation’. After the ions are implanted in the layer, the remaining sections of resist that were protecting areas that should not be modified are removed.
Packaging
The entire process of creating a silicon wafer with working chips consists of thousands of steps and can take more than three months from design to production. To get the chips out of the wafer, it is sliced and diced with a diamond saw into individual chips. Cut from a 300-mm wafer, the size most often used in semiconductor manufacturing, these so-called 'dies' differ in size for various chips. Some wafers can contain thousands of chips, while others contain just a few dozen. The chip die is then placed onto a 'substrate'. This is a type of baseboard for the microchip die that uses metal foils to direct the input and output signals of a chip to other parts of a system. And to close the lid, a 'heat spreader' is placed on top. This heat spreader is a small, flat metal protective container holding a cooling solution that ensures the microchip stays cool during operation. Wiliot, Ayar Labs, SPTS Technologies, and Applied Materials: these are just some of the names in the microchip packaging business, but there are many more.
A microchip is now ready to work
The microchip is now ready to get to ,work as part of our smartphone, TV, tablet or any other electronic device. It’s probably only about the size of our thumb, but one chip can contain billions of transistors. For example, Apple’s A16 Bionic system-on-a-chip contains 16 billion transistors and can perform 17 trillion operations per second. Of course, semiconductor manufacturing involves far more than just these steps. There's also?measurement and inspection, electroplating, testing, and much more. And each microchip goes through this process hundreds of times before it becomes part of a device.
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