Reasonable stack-up design can effectively mitigate electromagnetic interference (EMI) in PCBs by optimizing signal return paths, controlling electromagnetic field distribution, and minimizing loop area. Below are key strategies and principles:
1. Proximity of Power and Ground Planes
- Principle: Place the power plane adjacent to the ground plane to form a natural "plane capacitor," which filters high-frequency noise and reduces power impedance.
- Example: For a 4-layer PCB, the recommended stack-up is Signal-Ground-Power-Signal (S-G-P-S), ensuring tight coupling between the middle layers.
- Advantage: Provides a low-impedance return path for high-frequency signals and reduces loop radiation area.
2. Minimize Spacing Between Signal Layers and Reference Planes
- Strategy: Place high-speed signal layers close to reference planes (ground or power) with minimal spacing (e.g., ≤0.2mm).
- Benefits: (1) Shortens return paths and reduces loop inductance. (2) Increases interlayer capacitance to suppress high-frequency noise.
3. Maintain Integrity of Power/Ground Planes
- Avoid Split Planes: Use continuous ground or power planes to prevent return path detours.
- Exceptions: If splitting is unavoidable (e.g., multiple power domains), ensure critical high-speed signals do not cross splits, or bridge splits with decoupling capacitors.
4. Route High-Speed Signals on Inner Layers
- Strategy: Place high-frequency signals (e.g., clocks, differential pairs) on inner layers between two reference planes for electromagnetic shielding.
- Example: A 6-layer PCB stack-up: Signal-Ground-Signal-Power-Signal-Ground (S-G-S-P-S-G), with high-speed signals on layers 3 and 5.
5. Symmetrical Stack-up Design
- Purpose: Balance thermal stress and electromagnetic field distribution to reduce common-mode radiation.
- Example: An 8-layer PCB with symmetry: Signal-Ground-Signal-Power-Power-Signal-Ground-Signal (S-G-S-P-P-S-G-S).
6. Use Low Dielectric Constant (Dk) Materials
- Selection: Prioritize low-Dk materials (e.g., FR-4: Dk≈4.2; Rogers 4350B: Dk≈3.48) and low-loss tangent (Df) substrates for high-speed signals.
- Advantage: Reduces signal propagation delay, attenuation, and radiated energy.
7. Ground Via Stitching
- Application: Densely place ground vias at PCB edges, connectors, or around high-frequency components to create a Faraday cage effect.
- Role: Blocks EMI leakage paths and suppresses edge radiation.
8. Differential Signals and Impedance Control
- Differential Pairs: Maintain equal length and spacing for differential traces, referenced to the same plane.
- Impedance Matching: Use stack-up calculations (e.g., IPC-2141 formulas) to ensure consistent characteristic impedance (e.g., 100Ω differential) and minimize reflections.
9. Power Decoupling and Filtering
- Decoupling Capacitors: Place multi-layer ceramic capacitors (MLCCs) near power pins (e.g., 0.1μF for high-frequency, 10μF for low-frequency noise).
- Power Plane Separation: Isolate noise-sensitive analog and digital power domains with beads or inductors.
Key Considerations
- Simulation: Validate signal integrity and EMI risks using SI/PI tools (e.g., ANSYS HFSS, Cadence Sigrity).
- Avoid Via Cross-Splits: Prevent forced return path detours that increase loop area.
- Cost-Performance Trade-off: Balance stack-up performance with manufacturing costs (e.g., material selection, layer count).
By implementing these strategies, stack-up design can structurally enhance electromagnetic compatibility (EMC). Combined with shielding and filtering, it systematically reduces EMI risks.
