How to make a good PCB board?
AKEN Cheung 封装基板制造商
Director . Advanced packaging IC substrate manufacturer. Advantages: Cost reduction with realiability. FCBGA/ FCCSP/ CSP/ SiP/ Module/ BGA memory DDR3/DDR4/DDR5/ mmwave/ Embedded/ PCB substrate, uHDI PCB etc. mSAP
during meizhou kdpcb company help customers produce pcb,they always support some design idea to customer engineer,and sometimes,we also learned something from our customers engineer,we always learn and improve each other.
We all know the PCB board is to design the schematic diagram into a real PCB circuit board, please don't underestimate this process, many principles upstream through things in engineering is difficult to achieve, or others to achieve the things other people are not realized, so that a printed circuit board (PCB) is not difficult to do, but to do a good job in a printed circuit board (PCB) is not an easy thing. Two major difficulties in the field of microelectronics is high frequency signal and weak signal processing, in the PCB production level is especially important, the same principle design, the same components, PCB made by different people has different results, so how to make a good PCB board?
One, to clear design goals
Prevent PCB board or small high-frequency received a design task, we must first clear the design target is ordinary PCB PCB signal processing PCB board has both high frequency and small signal processing PCB board if it is ordinary, as long as do layout reasonable and tidy, mechanical size is accurate and correct, if the load line and long-term, to adopt some means of processing, reducing the load, long term to strengthen driven, focus on long-term reflection when the plate is more than 40 MHz signal line to the signal line for special considerations such as line crosstalk problems if the frequency is higher in wiring length is more stringent restrictions.
According to distribution parameters of the network theory of high-speed circuit connected between the interaction is decisive factor in system design can not be ignored, with door transmission speed increase in the signal line opposition will be a corresponding increase in crosstalk between adjacent signal lines will be directly proportional to increase usually high speed circuit power consumption and heat dissipation is great.
In high speed PCB should be paid more attention when the board has the millivolt level even microvolt weak signal of the signal line requires special consideration because of the small signal is too weak is very vulnerable to other strong signal interference shielding measures is often necessary otherwise it will greatly reduce the signal-to-noise ratio so that the useful signal is noise flood can not effectively extracted in board test should also be considered in the design stage of the test point of physical location test point isolation and other factors can not be ignored because some small signal and high frequency signal is not added directly to the probe measurement, in addition to considering to make the design of the idea of the design of some other object the related factors such as package board board layers by components of the mechanical strength in PCB before the board.
Two, understand the function of the components of the layout and wiring requirements
We know that some special components in the layout have special requirements such as analog signal amplifier LOTI and APH analog signal amplifier on the power requirements to smooth small ripple small analog signal part to try to stay away from power devices in OTI in small signal amplification part also specifically with shield to stray electromagnetic interference to shield off glink chip used in the NTOI board is ECL technology power heating badly on must be in the layout must be special consideration if the natural heat dissipation of heat dissipation.
The glink chip was placed in the air flow is smooth and hash out the heat cannot to other chips constitute effect if the board is provided with a horn or other high power devices have may the power caused by severe pollution that should cause enough attention.
Three, the layout of components to consider the layout of components
The first thing to consider is a factor to connect electrical properties closely related components to put together especially for some high-speed line layout will make it as short as possible power signal and small signal device to separate to meet the circuit performance under the premise of components but also consider the tidy appearance is easy to test the board's mechanical size socket the position also need to seriously consider the high-speed system grounding and interconnection line transmission delay time is in system design should first consider the factors of signal line transmission time to the total speed of the system is greatly affected, especially for ECL circuit high speed integrated circuit itself. Although the speed is very high, but due to delays in ordinary interconnection lines on the bottom of each 30cm length about 2ns increase the delay time can be slowed down. Image shift register synchronous counter.
The synchronous working parts is best placed because different plug-in board clock signal transmission is not equal to the time delay may make shift register output error if not put on a board in synchronization is the key from the public when the clock source connected to the plug-in boards of the clock line length must be equal to four wiring considered along with after the completion of the OTNI and stellate optical fiber network design will have more above 100MHz with high-speed signal lines of the board to design here will introduce some of the basic concepts of the high-speed line with a plug-in board in the.
1, the transmission line on the printed circuit board of any long signal pathway can be regarded as a transmission line if the line transmission delay time signal rise time is much shorter than that produced by the main signal rise during the reflection will be submerged showed no overshoot and ringing on the recoil at most MOS circuit due to rising time on line transmission delay time of the line can be so much larger than the length in meters without signal distortion for high speed logic circuit especially in high speed ECL integrated circuits due to the increase in the speed of the edge if no other measures along the length of the line must be shortened in order to maintain the integrity of the two signal a method to make high-speed circuit.
In a relatively long line without serious waveform distortion TTL on rapid decline edge using Schottky diode clamping methods make use of impulse is clamped on the ground potential is lower than that of a diode voltage drop on the level that would reduce the recoil range behind the, slower rising edge allow too rushed but it is at level H state circuit of relatively high output impedance 5080 attenuation in addition due to the H level state immunity is Ambassador recoil problem is not very prominent on HCT series devices if the Schottky diode clamped and series resistance termination method combined with the improvement of the effect will be more obvious.
When the fanout along the signal line at a higher bit rate and faster edge rates TTL shaping method described above is some insufficient because line there is a reflected wave them in high rate will tend to synthesis and cause severe distortion of the signal and anti-jamming ability is reduced so as to understand the reflection problem in ECL systems usually use another method of impedance matching method using this method can make the reflection by control signal integrity ensure strict he said for a slower edge speed of the conventional TTL and CMOS devices for transmission line and is not really need. High speed ECL device transmission lines with fast edge speeds are not always needed but they can be used to predict the delay and to control the reflection and oscillation by impedance matching when the transmission line is used:
1, decide whether to use the transmission line of the basic factors have the following five they are 1 system signal along the rate
2, the line from 3 capacitive load (fanout number)
3, a resistive load end of the line connection mode 5 allows the recoil and overshoot percentage exchange immunity to reduce several types of degree 2 transmission line
(1) coaxial and twisted pair cable that they are often used in between the system and the system connecting the characteristic impedance of the coaxial cable typically have 50 and 75 twisted pair usually 1102 printed board microstrip line to microstrip line is a piece of ribbon guide (signal line) and between the ground plane with a dielectric separated if the thickness of the line width and the distance between the ground plane and is controllable, its characteristic impedance can be controlled the microstrip line characteristic impedance Z0 in Er printed the relative permittivity of the medium plate materials.
4, the transmission delay time of the microstrip line with the thickness of the dielectric layer t as the width of the line W is the length of the microstrip line depends only on the dielectric constant, which has nothing to do with the width or spacing of the line.
Designer's hobbies and system requirements, the main advantages of parallel terminal is the system speed and transmission signal online complete without distortion on long-term load, does not affect the line driver drive transmission gate delay time, and not influence its signal edge speeds, but will make the signal along the long line transmission delay time increases when driving large fanout load can be the distribution along the branches of the short-term and unlike series end then that must load sets total online terminal series termination method, the circuit driving several parallel load capability of the wire terminals in series. Due to the capacitive load caused by the delay time increment than the corresponding parallel terminal twice as big as the short-term due to the capacitive load edges pace slowed and the driving gate delay time increases but the series terminal crosstalk than parallel terminal to the main reason is along the series terminated transmission line of the signal amplitude.
Only one-half logic swing amplitude and switching current is only parallel termination switch current of half of the signal energy low crosstalk is small, the second PCB wiring technology of PCB is use double-sided and multilayer board depends on the maximum operating frequency and circuit complexity and the packing density of the requirements to determine when the clock frequency is more than 200MHz, the best selection of multilayer board if frequency than 350MHz best selection using Teflon as the dielectric layer of printed circuit board. Because the high frequency attenuation to some small parasitic capacitance to some small propagation speed is faster but also because of the larger provincial power of printed circuit board wiring has the following principles requirements 1 all parallel signal line to try to leave a larger interval to reduce the crosstalk if there are two distance closer to the signal line best in between the two lines go a grounding wire that can play a role in shielding Z0.
(2) mutation design signal transmission line to avoid a sharp bend in case the characteristic impedance of transmission line and reflection, try to design into a certain size uniform circular line printed line width according to the characteristic impedance of the microstrip and stripline formula to calculate the characteristic impedance of the microstrip line printed circuit board. Generally between 50120 to get the characteristic impedance of the line width must be very narrow, but it is not easy to produce fine lines and consider all kinds of factors generally choose impedance values around 68 is more appropriate, because the choice of characteristic impedance of 68 can be in between the delay time and power consumption to achieve the best balance of a 50 transmission line will consume more power while larger impedance can make power consumption is reduced, but the transmission delay time.
Hydrophobic due to the negative line capacitance can be caused by transmission delay time increases and the characteristic impedance of the decreased, but very low characteristic impedance unit segment length of the intrinsic capacitance is so transmission delay time and the characteristic impedance by load capacitance is less affected. One of the important features of the transmission line with proper termination is that the branch line should have no effect on the delay time of the line. When Z0 is 50 branch short-term length must be limited within 25cm so as not to appear big ringing.
4, for the four - sided or six - ply board, the lines on both sides of the circuit board must be perpendicular to each other to prevent cross - induced crosstalk.
5, printing plate if equipped with high current devices such as relay indicating lamp horn, they ground the best to separate walk alone to reduce the noise in the ground, ground of these high current device should be connected to the plug-in board and the backboard on a separate bus up, and these separate ground should also and the grounding point is connected.
AKEN,is famous in CHINA pcb industry,and more and more customers adminsive his job and his attitude.never let customer down is one of his rules.
pcb production need support.just contact him.
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