How to Find a Bad Channel in Your PCB in 2 Minutes
Chun-Ting "Tim" Wang Lee, PhD
SI Application Scientist at Keysight Technologies
The hardest thing about signal integrity simulation of a channel is often not performing the simulation. The hardest thing is figuring out what the specification requires of the channel. If the requirement is not readily available, a lot of time and effort could be wasted.
Most of the time, the result of a signal integrity simulation is the S-parameters. One has to know to look at the right places in the specification document to identify the impedance tolerance, allowed return loss and insertion loss profile.
I am glad to see that EP-Scan not only provides the insertion loss and return loss results for the simulated channel. It also allows users to choose a specification from a known standard (or your creation) to evaluate the results, see figure below.
With EP-Scan, you can spend less time looking for the specification, and spend more time making necessary changes to improve the channel.
Recently, I used the line impedance specification and found a problem in 2 minutes. As shown in the figure below, I simulated 8 PCIe Gen 3 differential pairs with a test plan, and added a customized specification to check for the impedance tolerance ±3% of 90 Ω. EP-Scan quickly showed me the pair that violated the specification.
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To empower PCB designers, EP-Scan includes standardized specifications and the ability to create customized specifications. Once the specification for your channel is identified, EP-Scan can tell you whether your design is a go in minutes.
Try EP-Scan 2023 using below links.
Leave a comment below if you want to be in on the exclusive first look of EP-Scan 2023 Update 1!
In the meantime, remember to anticipate before you measure and simulate.