How to design predictable PCB interconnects for 25-30 Gbps data links?
Yuriy Shlepnev
Developing Simbeor Electromagnetic Signal Integrity Software for Design of Predictable Interconnects!
What is the minimal amount of data needed to build PCB interconnect models that correlate with the measurements up to 40 GHz for 25-30 Gbps NRZ links? Systematic validation of manufacturing, measurements, and modelling may provide answer to this question. All three ingredients is required, to have the design success "fire". Systematic means analysis-to-measurement correlation observed not just for one or two structures (test coupons for instance), but rather for a broad range of typical interconnects – single-ended and differential, stripline and microstrip, simple planar and with the vertical transitions or vias, etc. Such comparison should be done consistently both in frequency (magnitude and phase of S-parameters) and time (TDR and optionally eye diagram) domains. The systematic validation or benchmarking allows to identify the minimal number of parameters, to design predictable interconnects (correlate analysis and measurement). It is a whale of a project, if you do it the first time without much experience. One of the industry-first validation platforms was the physical layer reference design board (PLRD-1) from Teraspeed Consulting Group. Example of a readily available validation platform is the CMP-28/32 channel modelling platform from Wild River Technology featured in the "sink-or-swim" article. Off the shelf validation platforms are convenient tools to learn, but the stackup and interconnect geometry in such platforms may be not representative for a production board. Custom validation platforms with the stackup structure similar to a production board have to be used in such cases. Results of one of such projects will be reported by Marko Marin from Infinera and Yuriy Shlepnev from Simberian at the oncoming DesignCon 2018 in "40 GHz PCB Interconnect Validation: Expectations vs Reality" paper. Note that the boards are not manufactured as designed, conductor roughness model parameters are non existent, making measurements from MHz to 50 GHz is extremely difficult and most of the EDA tools are not systematically validated at this frequency range. Attend the DesignCon 2018 and learn how to do the validation and design boards right the first time. The complete validation report will be available after the DesignCon.