High speed PCB VIA hole design

Through the analysis of the percolation characteristics, we can see that, in the high-speed PCB design, the seemingly simple overpass will also have a great negative effect on the design of the circuit.In order to reduce the adverse effect of the parasitic effect of the hole, the design can be as follows:

1. Considering the cost and signal quality, select a reasonable size of the hole size.For example, in the design of the memory module PCB of 6-10 layers, it is better to choose 10/20mil (drilling/welding disk), and for some high-density small-sized boards, it can also try to use the over-hole of 8/18mil.Under current technical conditions, it is difficult to use smaller sizes.Larger sizes can be considered for power or ground crossings to reduce impedance.

2. The two formulas discussed above can be concluded that using a thin PCB board is beneficial to reducing the two parasitic parameters of the hole.

3. The signal on the PCB board is as low as possible, which means not to use unnecessary holes.

4. The pins of the power supply and the ground should be punched nearby, and the shorter the lead between the holes and the pins, the better, because they will lead to an increase in inductance.At the same time the power and ground leads should be as thick as possible to reduce impedance.

5. Put some grounding holes near the hole of the signal exchange to provide the nearest circuit for the signal.You can even put a lot of extra grounding holes on the PCB board.Of course, you need to be flexible at design time.The overhole model discussed in the previous section is the condition of the welding disk on each layer, and sometimes we can reduce or even remove the welding disks of some layers.Especially in the case of a hole density is very big, can lead to the copper layer to form a partition circuit fault trough, solve this problem in addition to moving the position of the hole, we can also consider a hole in the copper layer of bonding pad size decreases.