HFSS Cutouts: It’s Hip to be Square!

OK, maybe you’re not a Huey Lewis and the News fan, but there is a method to the madness, and that is to talk about HFSS cutouts. With the incredible success of HFSS 3D Layout in transforming SI/PI simulation workflows for PCB, package, and IC designs, there is still one limiting simulation strategy employed by users that I continue to see today… and that is conformal ‘cutouts.’ Frankly we all need to “cut-it-out”. Going back a dozen years or so there was a rationale to creating what I would call “hyper-conformal” cutouts from PCB designs for HFSS simulations. Back then a HFSS user would have been lucky to have a machine with as much as 200GB of memory for simulations and as a result users would try to make the geometric size of the model as small as possible. The strategy being the smaller the footprint, the fewer the mesh elements, the smaller the memory and thus the simulation would run in the available hardware and be as fast as possible. Now, speed and memory savings is great but sometimes that practice would cause accuracy issues because the cutout edges would be too close to the traces or worse, introduce unphysical return paths. But it was a common practice pushed by Ansys support engineers. As a result, numerous features were introduced into the HFSS workflow to automate this practice.

Dearly beloved, I am here to tell you there’s something else (sorry, Spotify is stuck on an 80’s channel today). You we just do not need to do this anymore. Instead, today it’s hip to be square, so grow that cutout and square it off. Capture more nets in your design and avoid the dreaded false or missing return paths and confidently extract more valuable design information from one single HFSS simulation. No more divide-and-conquer. Tear out all those extra, accuracy-diminishing steps still left in your workflow, like a booby trap lurking to trip you up. The ability to remove these steps arises from many reasons, but some of the most important are the effectiveness of the HFSS 3D Layout simulation workflow, HFSS’ ability to solve on distributed memory elastic compute platforms (introduced back in 2014) and just the plain fact that HFSS has so much more capacity and speed than many if not most users even realize. I bet as much as 80% of the user base is completely unaware of the simulation capacity currently available from HFSS. We just don’t need to exercise this legacy conformal cutout approach and as a result can eliminate whatever uncertainty is introduced with it. And be aware that there is a 20% HFSS user base out there gaining a competitive advantage in your market because they are racing away from you in their utilization of HFSS thanks to its capacity.

Look for Ansys to publish more thoughts on this topic in a blog authored by Aaron Edwards, Director of Ansys Customer Excellence for the North American high frequency team. He has some useful and passionate points to make on this topic so you can get your designs simulating as fast as possible with HFSS. In the meantime, get to work on ripping out those unhelpful and unneeded steps in your design flow. With HFSS, it’s hip to be square!