FPGA NOW,THEN
Sampath VP
ASIC/FPGA Design Professional | SoC Architecture | Technology Evangelist | IEEE Reviewer|
Network boxes have always needed one thing - bandwidth. FPGAs provided that bandwidth by massively parallelizing tasks like packet switching and by blasting bits at a blinding rate through ever-faster IO contrivances. The bandwidth market needed more LUTs, higher Fmax, more Gbps, more multipliers, and more memory with the least power possible. They made low-cost devices, industrial strength devices, rad-hard devices, mid-range devices, and - most recently - systems on chip. Processor cores were rolled into the mix - both soft-core and hard-core varieties.Tool suites were enhanced to include embedded software development capabilities which brings the birth of SoC. The overall embedded market is shifting to faster and more capable processors. More Moore scaling produces: 1 Trillion transistors per die, >100X of 20nm technology .250X increase in throughput compared to 20nm.Minimum features of ~13X silicon atomic spacing .Faster transistors, but much slower interconnect .Long term options: Tunnel FET, nano wires, graphene, non-CMOS devices.Slower scaling combined with 3D is an attractive alternative.Because more advanced CPUs were available, the appeal of the first generation of SoC FPGAs was somewhat dampened.
In the year 2000, state-of-the-art FPGAs were built on 130-nm process technology, while state of the art CPUs were built on 90-nm process technology and were still relatively expensive for most embedded systems applications, and as a result were used less frequently than their CPLD or PAL counterparts.SRAM-based FPGAs enjoyed riding the CMOS cost reduction curve, such that nearly 50% of embedded systems also contain FPGAs.The resulting competitive advantage would swing the delicate balance of power and market share.
As advanced semiconductor costs grow even more in coming process technologies, this cost structure will make it even more difficult to economically justify building fixed-function semiconductors, suggesting that programmable technologies will see increasing investment, while fixed function devices, including specialized ASSPs and CPU derivatives, will see less. Today, however, leading-edge FPGAs are targeting 28-nm process technology, which relatively few commercial CPUs or ASSPs use, or are likely to use, in the near future. Network or a platform effect is called the Products that have an adoption interrelationship between producer, user, and ecosystem tend to exhibit. The basic of the platform effect is that the more use a particular product, or standard, attracts the more valuable it becomes to members of the user base and ecosystem. As a result, the members of the user base and ecosystem then invest more in the technology, thus attracting more use and creating a self-reinforcing cycle.Examples include PCs,video recording formats, and social networking sites.
SoC FPGAs have this platform effect. SoC FPGA platform that supports multiple vendors and CPU architectures will be best positioned to trigger this platform effect investment, thereby creating the most advantages to customers and ecosystem members who join in its adoption.Programmable logic is a handy super power.We can offload and accelerate demanding processing tasks - particularly DSP and other embedded supercomputing operations - better than with any other embedded solution and partition software tasks partially into hardware with enormous power savings.The integrated approach to FPGA design flow methodology is intended to stimulate the ecosystems from leading processor architectures to invest in a single FPGA platform and tool flow, thus creating an enriched set of tools, application software, operating system software, and professional expertise.Mostly, the FPGA-based processors came in one variety, compared with “real” processors whose catalog was filled with hundreds or even thousands of variants..They wanted to have fast, efficient, common-architecture processing subsystems on their FPGAs.
A new generation of programmable devices - with high-end embedded processing subsystems combined with powerful programmable logic fabric. It brings up programmable possibilities that we only began to dream of before.At the same time, it brings up something the FPGA companies haven’t dreamed of for awhile either. New competitors.There are, it seems, already quite a number of companies making ARM-based devices with impressive lists of capabilities It has a processor with Dual ARM CORTEX,SDRAM and peripherals.It has also other hard IP and FPGA programmable fabric.It uses C/C++ for ARM,Common operating system,API for hardware accelerators(Verilog,VHDL,System Verilog),C,C++ by high level synthesis and open CL.