FPGA Digest: RISC-V, DPUs, & Chiplets

Achronix & Bluespec announce a partnership to enable the full potential of programmable SoCs, it's the last chance to register for the upcoming “The Rise of the DPU” LinkedIn Live, and in case you missed the Chiplet Summit, we have a recording of Achronix & Fraunhofer on eFPGA-powered chiplets.

Achronix FPGAs Add Support for Bluespec’s Linux-capable RISC-V Soft Processors to Enable Scalable Processing?

Achronix and Bluespec unveil a first-of-its-kind, Linux-capable RISC-V processor family for Speedster?7t FPGAs. This partnership simplifies integration, allowing engineers to enhance their FPGA designs with scalable, advanced RISC-V processing.?Read the full press release here .

LAST CHANCE: Register Now for “The Rise of the DPU” LinkedIn Live on March 28th at 9AM PST

Grab a cup of coffee and join us Thursday, March 28th at 9am PST to talk DPUs with Achronix SmartNIC expert, Scott Schweitzer, Serve the Home’s Patrick Kennedy, and Dell’Oro’s Baron Fung. You’ll get a quick intro, learn about the landscape and what’s coming, and then dive into the engineering of it all!?

Flexible eFPGA-Based Demonstration Platform for Die-to-Die Interface Testing?

Watch the Chiplet Summit recording between Achronix & Fraunhofer IIS/EAS on the flexible eFPGA-based platform for die-to-die interface testing. This collaboration between FPGA technology and Fraunhofer's expertise in chiplet integration showcases the future of advanced packaging technologies and high-speed data acquisition. Understand how eFPGA IP technology is revolutionizing protocol adaptation and integration for automotive and measurement equipment, offering a glimpse into the future of SoC designs.??