First-Pass Silicon Success for Synopsys USB-C 3.2 / DisplayPort 1.4 IP on TSMC N3E

Check out the great performance and impressive eye diagram for Synopsys USB-C 3.2 & DisplayPort 1.4a IP on TSMC N3E delivering a blazing 20Gbps for USB-C 3.2, 32 Gbps for DP 1.4a or simultaneous 10Gbps USB plus 16Gbps DP 1.4a! First-pass silicon success on the advanced TSMC N3E process is a testament to the robustness of the IP and stability of the process node. Synopsys offers complete solutions for USB/DisplayPort IP implementation, including PHYs, Controllers, Verification IP, and IP subsystems to accelerate design cycles.

The Synopsys USB-C 3.2/DisplayPort 1.4 IP is targeted for integration into SoCs that support connections to high-definition (HD), 2K, 4K, and 8K Ultra High Definition (UHD) display from mobile devices, set-top boxes and other applications requiring fast data transfers and output of high-resolution content.

Summary

Synopsys and TSMC have partnered closely to provide our mutual customers with a broad portfolio of high-quality IP for many generations of TSMC’s processes. We are excited to announce that we have TSMC N3E silicon back and in the lab, and everything is looking strong.

The tapeout included a wide range of IP to help our HPC data center, automotive, consumer and enterprise customers achieve first-pass silicon success on TSMC’s most advanced process technologies:

???????Multi-Protocol 112G PHY x4

???????PCIe 6.0 (64 Gbps) PHY x4; PCIe 5.0 (25GbE) MP32G PHY x4; PCIe 4.0 (16.0 Gbps) PHY x4

???????DDR5 PHY (8.4 Gbps)

???????LPDDR5X/5/4X PHY (8533 Mbps, 9600 Mbps overclocked)

???????eUSB2 PHY; USB-C 3.2 PHY

???????MIPI C-PHY/D-PHY Combo RX 6.5G/6.5G