Faster and Safer FPGA Development - Online Course

Faster and Safer FPGA Development - Online Course

Online course?29 January - 1 February, 2024, all days 9:00-13:00 CET.

Efficiency and?quality?is all a question of overview,?readability,?extensibility, maintainability,?and?reuse, - and a good architecture?all the way down is the answer. This applies to both Design?and?Verification, and this course will focus on the improvement potential for faster and safer FPGA Development.

BTW - Almost everything in this course also applies to Digital ASIC Design.

Design Architecture is key to efficiency and quality, but also to higher speed, lower power consumption, reduced resource usage, better reviews and improved reuse. This course is all about a pragmatic approach to good FPGA development, and how to improve important design related issues like:

  • Design Architecture & Structure
  • Clock Domain Crossing
  • Coding and General Digital Design
  • Reuse and Design for Reuse
  • Timing Closure
  • Quality Assurance - at the right level


Please check out the?course details

Quotes from previous courses:

  • The only bad thing about this course - is that we didn't do it earlier
  • An eye opener - Most issues apply directly in our organisation
  • A very good course on very relevant improvement potentials
  • I think the material is need-to-know for every designer
  • The course makes you think through how you and your company are doing things


要查看或添加评论,请登录

社区洞察

其他会员也浏览了