Extension of DUV Multipatterning Toward 3nm

China's recent achievement of a 7nm-class foundry node using only DUV lithography [1] raises the question of how far DUV lithography can be extended by multipatterning. A recent publication at CSTIC 2023 indicates that Chinese groups are currently looking at extension of DUV-based multipatterning to 5nm, going so far as to consider use 6 masks for one layer [2]. Comparing the DUV-based and EUV-based approaches going towards 3nm leads to an interesting conclusion.

LELE Patterning

The most basic form of multipatterning is the so-called "Litho-Etch-Litho-Etch" (LELE) approach, which is essentially doing the basic lithography followed by etching twice. This enables a halving of pitch, as a second feature is inserted between two printed first features. By extension, LE3 (3xLE) and LE4 (4xLE) may follow. However, using these approaches for getting to less than half the original pitch is no longer favored, with the arrival of self-aligned spacer patterning.

Self-Aligned Spacer Patterning

Self-aligned spacer patterning has the advantage over LELE of not requiring an extra lithography step, thereby saving the extra cost. Spacer deposition and subsequent etchback, followed by gapfill and subsequent etchback, replace the coat, bake, expose, bake, develop lithography sequence. While much cheaper, precise process control is still required, such as spacer thickness and etch rate selectivity. A one-time spacer application leads to feature doubling within a given pitch. Hence this is often referred to as self-aligned double patterning (SADP). Re-application leads to self-aligned quadruple patterning (SAQP), as may be expected.

Subtractive Patterning

While LELE and SADP both naturally add features to a pattern, it is sometimes necessary to remove parts of those features for the final layout. Cut masks indicated areas where line segments are to be removed. These are also called block locations when the line-forming etch is blocked. The inverse mask is called a keep mask. Restricting a line break to a single line width has placement issues if the adjacent line can also be etched. When alternate lines can be arranged to be made from different materials to be etched, line breaks can be made with better tolerances (Figure 1).

Figure 1. Self-aligned block/cut only removes sections of alternate lines.

For a given interconnect line, the distance between breaks is expected to be at least two metal pitches. Thus, two masks per line are expected when the metal pitch is from 1/4 to 1/2 of the resolution limit.

Figure 2. Two sets of block/cut masks are required for the two sets of etch.

Alternate Line Arrangement

Arranging the alternate lines is natural by LELE, SADP, SAQP or a hybrid of LELE and SADP known as SALELE (self-aligned LELE) [3]. SALELE has already been considered the default use for EUV for the tightest metal pitches [2, 4].

DUV vs. EUV Cost Assessment

One of the expectations for multipatterning with DUV has been burgeoning cost, relative to EUV. It is time for an updated re-assessment. First, we use the latest (2021) normalized patterning cost estimates [5] (Figure 3).

Figure. 3 Normalized costs for patterning, from Reference 5.

Next, we use representative patterning styles for DUV and EUV for the various nodes (Figure 4).

Figure 4. DUV vs. EUV patterning costs vs. node

Several comments are in order:

  1. For 7nm DUV, 40 nm pitch is at a point where the only features that can be resolved are lines, so these lines have to be cut in a separate exposure.
  2. For 7nm EUV, a separate line cut is used since at 40 nm pitch, the required resolution (~20 nm) is less than the point spread function of the EUV system (~25 nm). A High-NA EUV system is also not advantageous for this pitch, because of depth of focus and pupil fill limitations [6].
  3. For 3/5nm DUV, LELE SADP is more flexible than SAQP for sub-40 nm pitch [7].
  4. For 3/5nm EUV, the driving force of using LELE is the stochastic behavior at <17 nm half-pitch and <20 nm isolated linewidth [8,9]. As we approach 10 nm dimensions, the electron scattering dose-dependent blur [10-12] will also become prohibitive. The optical resolution of the system, i.e., NA, is no longer relevant.
  5. Pattern shaping is not considered as a way to eliminate cuts, as it would make the pre-shaping lithography much more difficult (Figure 5). Also, angled ion beam etching has generally been used to flatten pre-existing topography, reducing the etch mask height [13].

Figure 5. For pattern shaping the pattern before shaping is very litho-unfriendly.

For the most part, we can make the direct judgment that DUV LELE is much cheaper than EUV single exposure (SE). Also, DUV LE4 is cheaper than EUV double patterning. Although LELE requires extra steps over SE, there is also the consideration of EUV system maintenance vs. DUV system maintenance, as well as energy consumption. DUV LELE uses half as much energy as EUV SE, DUV SADP about 2/3, and even DUV LE4 uses just under 85% of the energy for EUV SE [14].

All this serves to highlight that moving to advanced nodes requires facing growing cost, regardless of DUV or EUV choice.

References

[1] https://www.techinsights.com/blog/techinsights-finds-smic-7nm-n2-huawei-mate-60-pro

[2] Q. Wu et al., CSTIC 2023.

[3] Y. Drissi et al., Proc. SPIE 10962, 109620V (2019).

[4] R. Venkatesan et al., Proc. SPIE 12292, 1229202 (2022).

[5] S. Snyder et al., 2021 EUVL Workshop, https://www.euvlitho.com/2021/P2.pdf

[6] F. Chen, When High NA is Not Better Than Low NA in EUV Lithography, 2023, https://www.youtube.com/watch?v=10K5i4QdLBU

[7] S. Sakhare et al., Proc. SPIE 9427, 94270O (2015).

[8] L. Meli et al., J. Micro/Nanolith. MEMS MOEMS 18, 011006 (2019).

[9] D. De Simone and G. Vandenberghe, Proc. SPIE 10957, 109570Q (2019).

[10] A. Narasimhan et al., Proc. SPIE 9422, 942208 (2015).

[11] I. Bespalov et al., ACS Appl. Mater. Interfaces 12, 9881 (2020).

[12] F. Chen, Modeling EUV Stochastic Defects With Secondary Electron Blur, https://www.dhirubhai.net/pulse/modeling-euv-stochastic-defects-secondary-electron-blur-chen

[13] M. Ulitschka et al., J. Europ. Opt. Soc. - Rapid Pub. 17:1 (2021).

[14] L-A. Ragnarsson et al., 2022 Electron Dev. Tech. Manuf., 82 (2022).


Ed Korczynski

Semiconductor Industry Business

1 年

Excellent overview of DUV and EUV MP modeling! For some additional details, see my 2018 SPIE article on "Cost modeling 22nm pitch patterning approaches" (https://spie.org/Publications/Proceedings/Paper/10.1117/12.2297454?SSO=1) which includes the following summary paragraph: From first-principles and preliminary reports, yield and TAT for EUV-based flows will be superior to ArFi-based flows [7]. Also, despite stochastic factors, the measured edge-placement error (EPE) standard deviation for vias/contact-holes is reportedly 33-90% improved when using a single-exposure of EUV compared to 3-4 exposures of ArFi [8]. Thus, for similar CPWPs it is expected that actual CoO for EUV-based flows will be significantly lower than ArFi-based flows.

Zhenle C.

Senior Process Engineer at Irradiant

1 年

Great article! I’m thinking another advantage with self-aligned spacer could be decreasing LER due to more etch steps? How’s the LER with EUV SE given the low photon count?

Tanj Bennett

Esse ergo cogito: Chief Scientist at Avant-Gray LLC: Poratbo - tanjb.substack,com

1 年

As you get into the more complex combinations of multi-material and multi-mask do you end up with design rules that constrain the gate density with DUV, compared to EUV, even though you may nominally be able to print a same sized feature? You just can't place things as freely. For example EUV has shown ability to print 2D metal layers low down. Not as fine pitch as linear patterns, but advantages to putting it on a single layer instead of 2 orthogonal layers plus vias. So when you get to nominal parity with 3nm are you still gaining effective density of the design?

Dr Rudolf Mauch

Agile Leadership in Key Account Management. Extraordinary efforts for normal profits? - how to realize the profitable value exchange...

1 年

The real quest will be yield and costs against EUV.

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