Digital Signal Termination
William,(Bill)”Stripes”, (Will)“Sparky” M.
Guest Lecturer, Tutor, and Staff Corrections Lecturer and Writer at University of Iowa Roy J. and Lucille A. Carver College of Medicine; Mayo Clinic, Alex School of Medicine;
Will Murray
Digital Signals traveling down etch, through connectors, over wires, etc, are similar to pulses sent down Transmission Lines from the analysis stand point. This means proper drive matching and signal termination must be considered for virtually all signals that are reasonably high in frequency AC wise. (How fast depends on the distance and the velocity of propagation in the transmission media). Failure to consider this can result in unwanted signal reflections causing multi-clocking and other effects.
In some cases, series termination is applied at the signal source while AC and Parallel termination are applied at the signal destination or load. In Series Termination one obviously places a resistance in series with the driving circuit. Some FPGA’s even have these series resistors built in and programmable. Other FPGA’s have programmable drive currents which can to a degree help achieve some of the same results.
In Parallel Termination the signal is terminated by placing a resistance in parallel with the load. This gives a heavier load to help dampen out reflections from the load end miss-match. This intuitively dissipates more power than the last type of termination under discussion, but uses fewer components.
In AC Termination the signal is terminated by placing an RC snubber circuit in parallel with the load. This also presents a heavier AC load to help dampen out reflections from the load end miss-match, but does not present a DC load to the driver circuit – Thus using less power generally than a Parallel Terminator circuit. A disadvantage of this circuit is the higher component count – potentially important in high vibration applications.
When Sizing the termination components for value the board or signal path’s characteristic impedance must be considered. The resistance should match the characteristic impedance for Parallel and AC Termination. Series termination on the other hand often depends on somewhat on the driver strength as well as the capacitance of the line and far end input(s).
There are many more good resources on Digital termination out on the web. Some of the best and most widely referred to include Dr. Howard Johnsons books, website, and articles.
What sort of signal transmission issues and challenges do you find yourself facing when sending signals off-chip?